Transcription of High-Speed Layout Guidelines - TI.com
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High-Speed Layout Guidelines - TI.com
1 SCAA082A November2006 RevisedAugust2017 SubmitDocumentationFeedbackCopyright 2006 2017,TexasInstrumentsIncorporatedHigh-Sp eedLayoutGuidelinesApplicationReportSCAA 082A November2006 RevisedAugust2017 high -SpeedLayoutGuidelinesAlexanderWeile r,AlexanderPakosta,and ,suchas clocksignalsand theirrouting,and givesdesignersa reviewof the ,electromagneticinterferenceproblemscan be minimizedwithoutusingcomplicatedformulas and shortintroductionto theory,whileSection2 focuseson be ,Vias,and trademarksare the propertyof desirableto effectivelyuse the PCBdesignrulesgivenin this istheneasyto identifythe undesirableeffectsthat can ariseand how to reasonPCBlayoutbecomesmoreand moreimportantis becauseof the trendto faster,higherintegrated,smallerformfacto rs,and higherthe switchingfrequenciesare, the moreradiationoccurson a ,manyEMI problemscan be minimizedto meetthe ElectromagneticCompatibilityElectromagne ticinterference(EMI)is radiofrequencyenergythat interfereswith the operationof radiofrequencyenergycan be producedby the deviceitselfor by (EMC)is the abilityof an electronicproductto operatewithoutcausingEMIthat wouldinterferewith otherequipmentand withoutbeingaffectedby EMI fromotherequipmentor November2006
important notice for ti design information and resources
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