Transcription of High-Speed Layout Guidelines - TI.com
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1 SCAA082A November2006 RevisedAugust2017 SubmitDocumentationFeedbackCopyright 2006 2017,TexasInstrumentsIncorporatedHigh-Sp eedLayoutGuidelinesApplicationReportSCAA 082A November2006 RevisedAugust2017 high -SpeedLayoutGuidelinesAlexanderWeile r,AlexanderPakosta,and ,suchas clocksignalsand theirrouting,and givesdesignersa reviewof the ,electromagneticinterferenceproblemscan be minimizedwithoutusingcomplicatedformulas and shortintroductionto theory,whileSection2 focuseson be ,Vias,and trademarksare the propertyof desirableto effectivelyuse the PCBdesignrulesgivenin this istheneasyto identifythe undesirableeffectsthat can ariseand how to reasonPCBlayoutbecomesmoreand moreimportantis becauseof the trendto faster,higherintegrated,smallerformfacto rs,and higherthe switchingfrequenciesare, the moreradiationoccurson a ,manyEMI problemscan be minimizedto meetthe ElectromagneticCompatibilityElectromagne ticinterference(EMI)is radiofrequencyenergythat interfereswith th
important notice for ti design information and resources
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094: Microstrip and Stripline Design, Analog, Microstrip and Stripline Design, Microstrip, Microstrip and Stripline Transmission Line Structures, Circularly Polarized 60 GHz Microstrip Antenna, Dual Patch Triangular Microstrip, Dual Patch Triangular Microstrip Antenna, Digital Signals Integrity Tutorial, Design & Layout Guide, Microstrip Propagation Times Slower Than, Design & Optimization of Stepped Impedance Low