Transcription of Interfacing Between LVPECL, VML, CML and LVDS …
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Interfacing Between LVPECL, VML, CML and LVDS …
Application ReportSLLA120 - December 20021 Interfacing Between lvpecl , VML, CML, and lvds LevelsNick HollandSerial Gigabit SolutionsABSTRACTThis application report introduces the various interface standards used today in moderntelecom and datacom systems and describes the methods used to interface Between similarand different I/O structures used on Texas Instruments serial gigabit solutions products. Themain logic levels discussed in this application report are low-voltage positive/pseudoemitter-coupled logic ( lvpecl ), current-mode logic (CML), voltage-mode logic (VML) andlow-voltage differential signaling ( lvds ).
SLLA120 6 Interfacing Between LVPECL, VML, CML, and LVDS Levels 3.1.2 Input Stage for Devices Using LVPECL Drivers The TNETE2201 input stage consists of a differential pair which requires its inputs (Input+ and
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