Transcription of Interfacing Between LVPECL, VML, CML and LVDS …
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Interfacing Between LVPECL, VML, CML and LVDS …
Application ReportSLLA120 - December 20021 Interfacing Between lvpecl , VML, CML, and LVDS LevelsNick HollandSerial Gigabit SolutionsABSTRACTThis application report introduces the various interface standards used today in moderntelecom and datacom systems and describes the methods used to interface Between similarand different I/O structures used on Texas Instruments serial gigabit solutions products. Themain logic levels discussed in this application report are low-voltage positive/pseudoemitter-coupled logic ( lvpecl ), current-mode logic (CML), voltage-mode logic (VML) andlow-voltage differential signaling (LVDS). This document focuses on these four logic levels,because they are now the most prevalent in today s communications systems. Thisdocument deals with the different SERDES devices from Texas Instruments, frominput/output structures, various high-speed drivers and receivers, receiver biasing, andtermination schemes.
SLLA120 Interfacing Between LVPECL, VML, CML, and LVDS Levels 3 1 Introduction As the communications industry is moving to faster data speeds and from parallel- to
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