Transcription of Introduction to PLLs - Engineering
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Introduction to PLLs - Engineering
Introduction to PLLs Behzad Razavi Electrical Engineering Department University of California, Los Angeles 1. Outline z Need for Frequency Synthesis z Phase Detector z Type I and II PLLs z PFD/Charge Pump Nonidealities z PLL Design Procedure 2. The Need for RF Synthesis z What happens if the LO z Need a freq. synthesizer: freq is not exactly what we want? 3. Mathematical Model of VCO. zWhat happens if a small sine appears on Vcont? 4. Phase Detector 5. Problem of Phase Alignment z Loop is locked if phase difference is constant. 6. Example z Ripple modulates VCO, producing sidebands. 7. Response to Frequency Step 8. Response to Phase Step 9. Phase and Frequency Settling 10. PLL Dynamics z How do we compute the time or frequency response of a PLL? 11. Type I PLL. z Trade-offs among stability, ripple, and phase offset z Limited capture range zWhy is this better than a piece of wire?
29 Charge Pump Design zSelect W/L of current sources for an overdrive of about 50-100 mV. zChoose L such that mismatch due to channel- length modulation remains below 10-20%. zChoose switch dimensions for a headroom consumption of 20-30 mV. zIf mismatch due to channel-length modulation results in excessive jitter or sidebands: (a) Increase C 2 and Cp (BW goes down).
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