Transcription of Lecture 20 - MIT
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Spring 20071 Lecture 20 Transistor Amplifiers (II)Other Amplifier StagesOutline Common-drain amplifier Common-gate amplifierReading Assignment:Howe and Sodini; Chapter 8, Sections Spring 200721. Common-drain amplifier A voltage buffer takes the input voltage which may have a relatively large Thevenin resistance and replicates the voltage at the output port, which has a low output resistance Input signal is applied to the gate Output is taken from the source To first order, voltage gain 1 Input resistance is high Output resistance is low Effective voltage bufferstage vgate iDcannot change vsource Source followerHow does it work?vsVBIASvOUTVDDVSSiSUPRSRL signal source+ Spring 20073 Biasing the Common-drain amplifier Assume device in saturation; neglect RSand RL; neglect CLM ( = 0) Obtain desired output bias voltage Typically set VOUTto halfway between VSSand VDD. Output voltage maximum VDD-VDSsat Output voltage minimum set by voltage requirement across +VOUTVGS=VTn(VSB)+ISUPW2L nCoxvsVBIASvOUTVDDVSSVSSiSUPRSRL signal source+ Spring 20074 Small-signal AnalysisUnloaded small-signal equivalent circuit model:vin=vgs+voutvout=gmvgs(ro//roc)The n:Avo=gmgm+1ro//roc 1 GSD+-vin+-vgs+-voutgmvgsroroc+-vin+- Spring 20075 Input and Output ResistanceInput Impedance : Rin= Output Impedance:Rout=1gm+1ro//roc 1gmSmall!
6.012 Spring 2007 2 1. Common-drain amplifier • A voltage buffer takes the input voltage which may have a relatively large Thevenin resistance and replicates the
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