Transcription of LVDS Owner’s Manual - Texas Instruments
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LVDS Owner’s Manual - Texas Instruments
lvds owner s ManualIncluding High-Speed CML and Signal ConditioningHigh-Speed Interface TechnologiesOverview 9-13 Network Topology 15-17 SerDes Architectures 19-29 Termination and Translation 31-38 Design and Layout Guidelines 39-45 Jitter Overview 47-58 Interconnect Media and Signal Conditioning 59-75I/O Models 77-82 Solutions for Design Challenges owner s ManualIncluding High-Speed CML and Signal ConditioningFourth Edition20084 Introduction ..7 High-Speed Interface Technologies Differential Signaling Technology .. lvds Low-Voltage Differential Signaling.
LVDS TIA/EIA-644 3.125 Gbps ± 350 mV Low LVPECL N/A 10+ Gbps ± 800 mV Medium to High CML N/A 10+ Gbps ± 800 mV Medium M-LVDS TIA/EIA-899 250 Mbps ± 550 mV Low B-LVDS N/A 800 Mbps ± 550 mV Low Driver Current Source Receiver = 3.5 mA Cross Section of Differential Pair = 350 mV 100 Figure 1-1. LVDS Driver and Receiver
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