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Making the Right Power/Performance ... - Flash …
Making the Right Power/Performance Tradeoffs for PCIe/NVMe SSDs Rick Huang SSD Product Marke/ng Manager SiliconMo/on Inc. Flash Memory Summit 2017 Santa Clara, CA 1 SSD Ge?ng Hot 2 Flash Memory Summit 2017 Santa Clara, CA SATA SSD replacing HDD - Seq. Read >500 MBps - Seq. Write >500 MBps PCIe SSD running faster - Seq. Read >3000 MBps - Seq. Write >1500 MBps Making SSD Cool n SATA to PCIe, power budget sSll constrained max ( ) or max @5V (8W) n Low power SSD design ma\ers Not suffering thermal issue Extending ba\ery lifeSme 3 Flash Memory Summit 2017 Santa Clara, CA Major Powers of ConsideraSon 4 Flash Memory Summit 2017 Santa Clara, CA AcSve * MBps per Wa\ Sleep * Lowest power Average * Average power Key Power Index 5 Flash Memory Summit 2017 Santa Clara, CA Ac1ve (MBps/W) * 100% 128KB Seq. Write Sleep (mW) * DEVSLP or Average (mW) * MobileMark 2014 SATA SSD (512GB) PCIe SSD (512GB) 96 150 528 MBps ? ? ? Power ConsumpSon in ASIC 6 Flash Memory Summit 2017 Santa Clara, CA Power = PDynamic + PStaSc c V2 f V Ileak Dominate acSve power Dominate sleep power AcSve Power Advanced Process n PDynamic ~= c V2 f Lower supply voltage reduces power significantly Higher development cost 7 Flash Memory Summit 2017 Santa Clara, CA 55nm 40nm 28nm 16nm Voltage (V) Power 100% 84% 56% 39% External DRAM NAND Flash AcSve Power Changing/GaSng Clocks 8 Flash Memory Summit 2017 Santa Clara, CA SSD Contro
Title: 20170809_FA31_Huang.pptx Author: Tracie Barnes Created Date: 8/22/2017 2:39:12 PM
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