Transcription of MC14516B - Binary Up/Down Counter - ON Semiconductor
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MC14516B - Binary Up/Down Counter - ON Semiconductor
Semiconductor Components Industries, LLC, 2014 March, 2014 Rev. 101 Publication Order Number: MC14516B /DMC14516 BBinary Up/Down CounterThe MC14516B synchronous Up/Down Binary Counter isconstructed with MOS P channel and N channel enhancement modedevices in a monolithic Counter can be preset by applying the desired value, in Binary ,to the Preset inputs (P0, P1, P2, P3) and then bringing the PresetEnable (PE) high. The direction of counting is controlled by applyinga high (for up counting) or a low (for down counting) to theUP/DOWN input. The state of the Counter changes on the positivetransition of the clock can be accomplished by connecting the carry Out to theCarry In of the next stage while clocking each Counter in parallel. Theoutputs (Q0, Q1, Q2, Q3) can be reset to a low state by applying a highto the reset (R) CMOS Counter finds primary use in Up/Down and differencecounting.
U/D Q1 P0 P3 Q3 PE VSS CARRY OUT Q0 CARRY IN BLOCK DIAGRAM VDD = PIN 16 VSS = PIN 8 6 11 14 2 7 Q0 Q1 Q2 Q3 CARRY OUT PE CARRY IN RESET UP/DOWN CLOCK P0 P1 P2 P3 1 5 9 10 15 4 12 13 3 TRUTH TABLE Carry In Up/Down Preset Enable Reset Clock Action 1 X 0 0 X No Count 0 1 0 0 Count Up 0 0 0 0 Count Down X X 1 0 X Preset
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