Memcon: TuningDDR4 for Power Performance

Tuning DDR4 for Power and PerformanceMike MichelettiProduct Manager Teledyne LeCroyAgenda Introduction DDR4 Technology Expanded role of MRS Power Features Examined Reliability Features Examined Performance Features Examined8/22/20132 DDR4 Goals & Motivations Spec development started in 2005; Officical JEDEC release Aug 2012 Up to Gbps (per pin) 2x Bandwidth Single Ended Signaling Similar clockingEvolutionary Path 8 Bit prefetch, same core frequency Lower Cost 30-40% Power saving (vs DDR3L), tCAL, LP-ASR, Power Savings C/A parity, CRC, MPR readout, ReliabilityAnalysts: 50% market penetration by 2015/2016 PowerReliability (RAS)PerformanceSignallingTe s tNew DDR4 Features Categorized4 TCSRTCARCS to CMD Latency (TCAL) VDDQ TermMax Power Saving Page sizeDBI3 DSWri

DDR4 Goals & Motivations Spec development started in 2005; Officical JEDEC release Aug 2012 2x Bandwidth • Up to 3.2 Gbps (per pin) • Single Ended Signaling • Similar clocking Evolutionary Path Lower Cost • 8 Bit prefetch, same core frequency • 30-40% power saving (vs DDR3L),

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  Performance, Power, Tuningddr4 for power performance, Tuningddr4

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