Transcription of Microcontroller Instruction Set - Keil
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2-71 Microcontroller Instruction SetFor interrupt response time information, refer to the hardware description :1. Operations on SFR byte address 208 or bit addresses 209-215 (that is, the PSW or bits in the PSW) also affect flag that Affect Flag Settings(1)InstructionFlagInstructionFla gCOVACCOVACADDXXXCLR COADDCXXXCPL CXSUBBXXXANL C,bitXMULOXANL C,/bitXDIVOXORL C,bitXDAXORL C,/bitXRRCXMOV C,bitXRLCXCJNEXSETB C1 The Instruction Set and Addressing ModesRnRegister R7-R0 of the currently selected Register internal data location s address. This could be an Internal Data RAM location (0-127) or a SFR [ , I/O port, control register, status register, etc. (128-255)].@Ri8-bit internal data RAM location (0-255) addressed indirectly through register R1or R0.#data8-bit constant included in Instruction .#data 1616-bit constant included in 1616-bit destination address. Used by LCALL and LJMP.
2-71 Microcontroller Instruction Set For interrupt response time information, refer to the hardware description chapter. Note: 1. Operations on SFR byte address 208 or bit addresses 209-215 (that is, the PSW or
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