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Microcontroller Instruction Set - Keil

2-71 Microcontroller Instruction SetFor interrupt response time information, refer to the hardware description :1. Operations on SFR byte address 208 or bit addresses 209-215 (that is, the PSW or bits in the PSW) also affect flag that Affect Flag Settings(1)InstructionFlagInstructionFla gCOVACCOVACADDXXXCLR COADDCXXXCPL CXSUBBXXXANL C,bitXMULOXANL C,/bitXDIVOXORL C,bitXDAXORL C,/bitXRRCXMOV C,bitXRLCXCJNEXSETB C1 The Instruction Set and Addressing ModesRnRegister R7-R0 of the currently selected Register internal data location s address. This could be an Internal Data RAM location (0-127) or a SFR [ , I/O port, control register, status register, etc. (128-255)].@Ri8-bit internal data RAM location (0-255) addressed indirectly through register R1or R0.#data8-bit constant included in Instruction .#data 1616-bit constant included in 1616-bit destination address. Used by LCALL and LJMP.

2-71 Microcontroller Instruction Set For interrupt response time information, refer to the hardware description chapter. Note: 1. Operations on SFR byte address 208 or bit addresses 209-215 (that is, the PSW or

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Transcription of Microcontroller Instruction Set - Keil

1 2-71 Microcontroller Instruction SetFor interrupt response time information, refer to the hardware description :1. Operations on SFR byte address 208 or bit addresses 209-215 (that is, the PSW or bits in the PSW) also affect flag that Affect Flag Settings(1)InstructionFlagInstructionFla gCOVACCOVACADDXXXCLR COADDCXXXCPL CXSUBBXXXANL C,bitXMULOXANL C,/bitXDIVOXORL C,bitXDAXORL C,/bitXRRCXMOV C,bitXRLCXCJNEXSETB C1 The Instruction Set and Addressing ModesRnRegister R7-R0 of the currently selected Register internal data location s address. This could be an Internal Data RAM location (0-127) or a SFR [ , I/O port, control register, status register, etc. (128-255)].@Ri8-bit internal data RAM location (0-255) addressed indirectly through register R1or R0.#data8-bit constant included in Instruction .#data 1616-bit constant included in 1616-bit destination address. Used by LCALL and LJMP.

2 A branch can be anywhere within the 64K byte Program Memory address 1111-bit destination address. Used by ACALL and AJMP. The branch will be within the same 2K byte page of program memory as the first byte of the following (two s complement) 8-bit offset byte. Used by SJMP and all conditional jumps. Range is -128 to +127 bytes relative to first byte of the following Addressed bit in Internal Data RAM or Special Function 12/97 Instruction SetInstruction Set2-72 Instruction Set SummaryNote:Key: [2B] = 2 Byte, [3B] = 3 Byte, [2C] = 2 Cycle, [4C] = 4 Cycle, Blank = 1 byte/1 cycle012345670 NOPJBCbit,rel[3B, 2C]JBbit, rel[3B, 2C]JNBbit, rel[3B, 2C]JCrel[2B, 2C]JNCrel[2B, 2C]JZrel[2B, 2C]JNZrel[2B, 2C]1 AJMP(P0)[2B, 2C]ACALL(P0)[2B, 2C]AJMP(P1)[2B, 2C]ACALL(P1)[2B, 2C]AJMP(P2)[2B, 2C]ACALL(P2)[2B, 2C]AJMP(P3)[2B, 2C]ACALL(P3)[2B, 2C]2 LJMP addr16[3B, 2C]LCALL addr16[3B, 2C]RET[2C]RETI[2C]ORLdir, A[2B]ANLdir, A[2B]XRLdir, a[2B]ORLC, bit[2B, 2C]3 RRARRCARLARLCAORLdir, #data[3B, 2C]ANLdir, #data[3B, 2C]XRLdir, #data[3B, 2C]JMP@A + DPTR[2C]4 INCADECAADDA, #data[2B]ADDCA, #data[2B]ORLA, #data[2B]ANLA, #data[2B]XRLA, #data[2B]MOVA, #data[2B]5 INCdir[2B]DECdir[2B]ADDA, dir[2B]ADDCA, dir[2B]ORLA, dir[2B]ANLA, dir[2B]XRLA, dir[2B]MOVdir, #data[3B, 2C]6 INC@R0 DEC@R0 ADDA, @R0 ADDCA, @R0 ORLA, @R0 ANLA, @R0 XRLA, @R0 MOV@R0, @data[2B]7 INC@R1 DEC@R1 ADDA, @R1 ADDCA, @R1 ORLA, @R1 ANLA, @R1 XRLA, @R1 MOV@R1, #data[2B]8 INCR0 DECR0 ADDA, R0 ADDCA, R0 ORLA, R0 ANLA, R0 XRLA, R0 MOVR0, #data[2B]9 INCR1 DECR1 ADDA, R1 ADDCA, R1 ORLA, R1 ANLA, R1 XRLA, R1 MOVR1, #data[2B]AINCR2 DECR2 ADDA, R2 ADDCA, R2 ORLA, R2 ANLA, R2 XRLA, R2 MOVR2, #data[2B]BINCR3 DECR3 ADDA, R3 ADDCA, R3 ORLA, R3 ANLA, R3 XRLA, R3 MOVR3, #data[2B]

3 CINCR4 DECR4 ADDA, R4 ADDCA, R4 ORLA, R4 ANLA, R4 XRLA, R4 MOVR4, #data[2B]DINCR5 DECR5 ADDA, R5 ADDCA, R5 ORLA, R5 ANLA, R5 XRLA, R5 MOVR5, #data[2B]EINCR6 DECR6 ADDA, R6 ADDCA, R6 ORLA, R6 ANLA, R6 XRLA, R6 MOVR6, #data[2B]FINCR7 DECR7 ADDA, R7 ADDCA, R7 ORLA, R7 ANLA, R7 XRLA, R7 MOVR7, #data[2B] Instruction Set2-73 Instruction Set Summary (Continued)Note:Key: [2B] = 2 Byte, [3B] = 3 Byte, [2C] = 2 Cycle, [4C] = 4 Cycle, Blank = 1 byte/1 cycle89 ABCDEF0 SJMPREL[2B, 2C]MOVDPTR,#data 16[3B, 2C]ORLC, /bit[2B, 2C]ANLC, /bit[2B, 2C]PUSHdir[2B, 2C]POPdir[2B, 2C]MOVX A,@DPTR[2C]MOVX@DPTR, A[2C]1 AJMP(P4)[2B, 2C]ACALL(P4)[2B, 2C]AJMP(P5)[2B, 2C]ACALL(P5)[2B, 2C]AJMP(P6)[2B, 2C]ACALL(P6)[2B, 2C]AJMP(P7)[2B, 2C]ACALL(P7)[2B, 2C]2 ANLC, bit[2B, 2C]MOVbit, C[2B, 2C]MOVC, bit[2B]CPLbit[2B]CLRbit[2B]SETBbit[2B]MO VXA, @R0[2C]MOVXwR0, A[2C]3 MOVC A,@A + PC[2C]MOVC A,@A + DPTR[2C]INCDPTR[2C]CPLCCLRCSETBCMOVXA, @RI[2C]MOVX@RI, A[2C]4 DIVAB[2B, 4C]SUBBA, #data[2B]MULAB[4C]CJNE A,#data, rel[3B, 2C]SWAPADAACLRACPLA5 MOVdir, dir[3B, 2C]SUBBA, dir[2B]CJNEA, dir, rel[3B, 2C]XCHA, dir[2B]DJNZdir, rel[3B, 2C]MOVA, dir[2B]MOVdir, A[2B]6 MOVdir, @R0[2B, 2C]SUBBA, @R0 MOV@R0, dir[2B, 2C]CJNE@R0, #data, rel[3B, 2C]XCHA, @R0 XCHDA, @R0 MOVA, @R0 MOV@R0, A7 MOVdir, @R1[2B, 2C]SUBBA, @R1 MOV@R1, dir[2B, 2C]CJNE@R1, #data, rel[3B, 2C]XCHA, @R1 XCHDA, @R1 MOVA, @R1 MOV@R1, A8 MOVdir, R0[2B, 2C]SUBBA, R0 MOVR0, dir[2B, 2C]CJNER0, #data, rel[3B, 2C]XCHA, R0 DJNZR0, rel[2B, 2C]MOVA, R0 MOVR0, A9 MOVdir, R1[2B, 2C]SUBBA, R1 MOVR1, dir[2B, 2C]CJNER1, #data, rel[3B, 2C]XCHA, R1 DJNZR1, rel[2B, 2C]

4 MOVA, R1 MOVR1, AAMOVdir, R2[2B, 2C]SUBBA, R2 MOVR2, dir[2B, 2C]CJNER2, #data, rel[3B, 2C]XCHA, R2 DJNZR2, rel[2B, 2C]MOVA, R2 MOVR2, ABMOVdir, R3[2B, 2C]SUBBA, R3 MOVR3, dir[2B, 2C]CJNER3, #data, rel[3B, 2C]XCHA, R3 DJNZR3, rel[2B, 2C]MOVA, R3 MOVR3, ACMOVdir, R4[2B, 2C]SUBBA, R4 MOVR4, dir[2B, 2C]CJNER4, #data, rel[3B, 2C]XCHA, R4 DJNZR4, rel[2B, 2C]MOVA, R4 MOVR4, ADMOVdir, R5[2B, 2C]SUBBA, R5 MOVR5, dir[2B, 2C]CJNER5, #data, rel[3B, 2C]XCHA, R5 DJNZR5, rel[2B, 2C]MOVA, R5 MOVR5, AEMOVdir, R6[2B, 2C]SUBBA, R6 MOVR6, dir[2B, 2C]CJNER6, #data, rel[3B, 2C]XCHA, R6 DJNZR6, rel[2B, 2C]MOVA, R6 MOVR6. AFMOVdir, R7[2B, 2C]SUBBA, R7 MOVR7, dir[2B, 2C]CJNER7, #data, rel[3B, 2C]XCHA, R7 DJNZR7, rel[2B, 2C]MOVA, R7 MOVR7, AInstruction Set2-74 Table 1. AT89 Instruction Set Summary(1)Note:1. All mnemonics copyrighted Intel Corp., PeriodARITHMETIC OPERATIONSADDA,RnAdd register to Accumulator112 ADDA,directAdd direct byte to Accumulator212 ADDA,@RiAdd indirect RAM to Accumulator112 ADDA,#dataAdd immediate data to Accumulator212 ADDC A,RnAdd register to Accumulator with Carry112 ADDC A,directAdd direct byte to Accumulator with Carry212 ADDC A,@RiAdd indirect RAM to Accumulator with Carry112 ADDC A,#dataAdd immediate data to Acc with Carry212 SUBBA,RnSubtract Register from Acc with borrow112 SUBBA,directSubtract direct byte from Acc with borrow212 SUBBA,@RiSubtract indirect RAM from ACC with borrow112 SUBBA.

5 #dataSubtract immediate data from Acc with borrow212 INCAI ncrement Accumulator112 INCRnIncrement register112 INCdirectIncrement direct byte212 INC@RiIncrement direct RAM112 DECAD ecrement Accumulator112 DECRnDecrement Register112 DECdirectDecrement direct byte212 DEC@RiDecrement indirect RAM112 INCDPTRI ncrement Data Pointer124 MULABM ultiply A & B148 DIVABD ivide A by B148 DAAD ecimal Adjust Accumulator112 MnemonicDescriptionByteOscillator PeriodLOGICAL OPERATIONSANLA,RnAND Register to Accumulator112 ANLA,directAND direct byte to Accumulator212 ANLA,@RiAND indirect RAM to Accumulator112 ANLA,#dataAND immediate data to Accumulator212 ANLdirect,AAND Accumulator to direct byte212 ANLdirect,#dataAND immediate data to direct byte 324 ORLA,RnOR register to Accumulator112 ORLA,directOR direct byte to Accumulator212 ORLA,@RiOR indirect RAM to Accumulator 112 ORLA,#dataOR immediate data to Accumulator212 ORLdirect,AOR Accumulator to direct byte212 ORLdirect,#dataOR immediate data to direct byte324 XRLA,RnExclusive-OR register to Accumulator112 XRLA,directExclusive-OR direct byte to Accumulator212 XRLA,@RiExclusive-OR indirect RAM to Accumulator112 XRLA,#dataExclusive-OR immediate data to Accumulator212 XRLdirect,AExclusive-OR Accumulator to direct byte212 XRLdirect,#dataExclusive-OR immediate data to direct byte324 CLRAC lear Accumulator112 CPLAC omplement Accumulator112 RLAR otate Accumulator Left112 RLCAR otate Accumulator Left through the Carry112 LOGICAL OPERATIONS (continued)

6 Instruction Set2-75 RRAR otate Accumulator Right112 RRCAR otate Accumulator Right through the Carry112 SWAP ASwap nibbles within the Accumulator112 DATA TRANSFERMOVA,RnMove register to Accumulator112 MOVA,directMove direct byte to Accumulator212 MOVA,@RiMove indirect RAM to Accumulator112 MOVA,#dataMove immediate data to Accumulator212 MOVRn,AMove Accumulator to register112 MOVRn,directMove direct byte to register224 MOVRn,#dataMove immediate data to register212 MOVdirect,AMove Accumulator to direct byte212 MOVdirect,RnMove register to direct byte224 MOVdirect,directMove direct byte to direct324 MOVdirect,@RiMove indirect RAM to direct byte224 MOVdirect,#dataMove immediate data to direct byte324 MOV@Ri,AMove Accumulator to indirect RAM112 MOV@Ri,directMove direct byte to indirect RAM224 MOV@Ri,#dataMove immediate data to indirect RAM212 MOVDPTR,#data16 Load Data Pointer with a 16-bit constant324 MOVC A,@A+DPTRMove Code byte relative to DPTR to Acc124 MOVC A,@A+PCMove Code byte relative to PC to Acc124 MOVX A,@RiMove External RAM (8-bit addr) to Acc124 DATA TRANSFER (continued)MnemonicDescriptionByteOscill ator PeriodMOVX A,@DPTRMove Exernal RAM (16-bit addr) to Acc124 MOVX @Ri,AMove Acc to External RAM (8-bit addr) 124 MOVX @DPTR,AMove Acc to External RAM (16-bit addr)

7 124 PUSH directPush direct byte onto stack224 POPdirectPop direct byte from stack224 XCHA,RnExchange register with Accumulator112 XCHA,directExchange direct byte with Accumulator212 XCHA,@RiExchange indirect RAM with Accumulator112 XCHD A,@RiExchange low-order Digit indirect RAM with Acc112 BOOLEAN VARIABLE MANIPULATIONCLRCC lear Carry112 CLRbitClear direct bit212 SETBCSet Carry112 SETBbitSet direct bit212 CPLCC omplement Carry112 CPLbitComplement direct bit212 ANLC,bitAND direct bit to CARRY224 ANLC,/bitAND complement of direct bit to Carry224 ORLC,bitOR direct bit to Carry224 ORLC,/bitOR complement of direct bit to Carry224 MOVC,bitMove direct bit to Carry212 MOVbit,CMove Carry to direct bit224 JCrelJump if Carry is set224 JNCrelJump if Carry not set224 JBbit,relJump if direct Bit is set324 JNBbit,relJump if direct Bit is Not set324 JBCbit,relJump if direct Bit is set & clear bit324 PROGRAM BRANCHINGM nemonicDescriptionByteOscillator PeriodInstruction Set2-76 ACALL addr11 Absolute Subroutine Call224 LCALL addr16 Long Subroutine Call324 RETR eturn from Subroutine124 RETIR eturn from interrupt124 AJMP addr11 Absolute Jump224 LJMP addr16 Long Jump324 SJMPrelShort Jump (relative addr)

8 224 JMP@A+DPTRJump indirect relative to the DPTR124 JZrelJump if Accumulator is Zero224 JNZrelJump if Accumulator is Not Zero224 CJNEA,direct,relCompare direct byte to Acc and Jump if Not Equal324 CJNEA,#data,relCompare immediate to Acc and Jump if Not Equal324 CJNERn,#data,relCompare immediate to register and Jump if Not Equal324 CJNE@Ri,#data,relCompare immediate to indirect and Jump if Not Equal324 DJNZRn,relDecrement register and Jump if Not Zero224 DJNZ direct,relDecrement direct byte and Jump if Not Zero324 NOP No Operation112 MnemonicDescriptionByteOscillator PeriodInstruction Set2-77 Table 2. Instruction Opcodes in Hexadecimal OrderHex CodeNumber of BytesMnemonicOperands001 NOP012 AJMP code addr023 LJMP code addr031 RRA041 INCA052 INCdata addr061 INC@R0071 INC@R1081 INCR0091 INCR10A1 INCR20B1 INCR30C1 INCR40D1 INCR50E1 INCR60F1 INCR7103 JBCbit addr,code addr112 ACALL code addr123 LCALL code addr131 RRCA141 DECA152 DECdata addr161 DEC@R0171 DEC@R1181 DECR0191 DECR11A1 DECR21B1 DECR31C1 DECR41D1 DECR51E1 DECR61F1 DECR7203 JBbit addr,code addr212 AJMP code addr221 RET231 RLA242 ADDA,#data252 ADDA,data addrHex CodeNumber of BytesMnemonicOperands261 ADDA,@R0271 ADDA,@R1281 ADDA,R0291 ADDA,R12A1 ADDA,R22B1 ADDA,R32C1 ADDA,R42D1 ADDA,R52E1 ADDA,R62F1 ADDA,R7303 JNBbit addr,code addr312 ACALL code addr321 RETI331 RLCA342 ADDCA,#data352 ADDCA,data addr361 ADDCA,@R0371 ADDCA,@R1381 ADDCA,R0391 ADDCA,R13A1 ADDCA,R23B1 ADDCA,R33C1 ADDCA,R43D1 ADDCA,R53E1 ADDCA,R63F1 ADDCA.

9 R7402 JCcode addr412 AJMP code addr422 ORLdata addr,A433 ORLdata addr,#data442 ORLA,#data452 ORLA,data addr461 ORLA,@R0471 ORLA,@R1481 ORLA,R0491 ORLA,R14A1 ORLA,R2 Instruction Set2-784B1 ORLA,R34C1 ORLA,R44D1 ORLA,R54E1 ORLA,R64F1 ORLA,R7502 JNCcode addr512 ACALL code addr522 ANLdata addr,A533 ANLdata addr,#data542 ANLA,#data552 ANLA,data addr561 ANLA,@R0571 ANLA,@R1581 ANLA,R0591 ANLA,R15A1 ANLA,R25B1 ANLA,R35C1 ANLA,R45D1 ANLA,R55E1 ANLA,R65F1 ANLA,R7602 JZcode addr612 AJMP code addr622 XRLdata addr,A633 XRLdata addr,#data642 XRLA,#data652 XRLA,data addr661 XRLA,@R0671 XRLA,@R1681 XRLA,R0691 XRLA,R16A1 XRLA,R26B1 XRLA,R36C1 XRLA,R46D1 XRLA,R56E1 XRLA,R66F1 XRLA,R7702 JNZcode addrHex CodeNumber of BytesMnemonicOperands712 ACALL code addr722 ORLC,bit addr731 JMP@A+DPTR742 MOVA,#data753 MOVdata addr,#data762 MOV@R0,#data772 MOV@R1,#data782 MOVR0,#data792 MOVR1,#data7A2 MOVR2,#data7B2 MOVR3,#data7C2 MOVR4,#data7D2 MOVR5,#data7E2 MOVR6,#data7F2 MOVR7,#data802 SJMP code addr812 AJMP code addr822 ANLC,bit addr831 MOVCA,@A+PC841 DIVAB853 MOVdata addr,data addr862 MOVdata addr,@R0872 MOVdata addr,@R1882 MOVdata addr,R0892 MOVdata addr,R18A2 MOVdata addr,R28B2 MOVdata addr,R38C2 MOVdata addr,R48D2 MOVdata addr,R58E2 MOVdata addr,R68F2 MOVdata addr,R7903 MOVDPTR,#data912 ACALL code addr922 MOVbit addr,C931 MOVCA,@A+DPTR942 SUBBA,#data952 SUBBA,data addr961 SUBBA,@R0 Hex CodeNumber of BytesMnemonicOperandsInstruction Set2-79971 SUBBA,@R1981 SUBBA,R0991 SUBBA,R19A1 SUBBA,R29B1 SUBBA,R39C1 SUBBA,R49D1 SUBBA,R59E1 SUBBA,R69F1 SUBBA,R7A02 ORLC,/bit addrA12 AJMP code addrA22 MOVC,bit addrA31 INCDPTRA41 MULABA5reservedA62 MOV@R0,data addrA72 MOV@R1,data addrA82 MOVR0,data addrA92 MOVR1,data addrAA2 MOVR2,data addrAB2 MOVR3,data addrAC2 MOVR4,data addrAD2 MOVR5.

10 Data addrAE2 MOVR6,data addrAF2 MOVR7,data addrB02 ANLC,/bit addrB12 ACALL code addrB22 CPLbit addrB31 CPLCB43 CJNEA,#data,code addrB53 CJNEA,data addr,code addrB63 CJNE@R0,#data,code addrB73 CJNE@R1,#data,code addrB83 CJNER0,#data,code addrB93 CJNER1,#data,code addrBA3 CJNER2,#data,code addrBB3 CJNER3,#data,code addrBC3 CJNER4,#data,code addrHex CodeNumber of BytesMnemonicOperandsBD3 CJNER5,#data,code addrBE3 CJNER6,#data,code addrBF3 CJNER7,#data,code addrC02 PUSH data addrC12 AJMP code addrC22 CLR


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