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PCIe 3.1 & M-PCIe™ Protocol

Copyright 2014, PCI-SIG, All Rights ReservedPCIe & M-PCIe ProtocolRichard SolomonSynopsys1 PCIeTechnology SeminarCopyright 2014, PCI-SIG, All Rights ReservedDisclaimerThe information in this presentation refers to specifications still in the development process. This presentation reflects the current thinking of various PCI-SIG workgroups, but all material is subject to change before the specifications are released. 2 PCIeTechnology SeminarAgenda PCIe Base Spec Newer Protocol ECNs Protocol ECRs Under Development M-PCIe ECNC opyright 2014, PCI-SIG, All Rights Reserved3 PCIeTechnology SeminarCopyright 2014, PCI-SIG, All Rights ReservedProtocol Content IncludedIn the PCIe Base Spec Older Protocol ECNs Against the PCIe Base Spec (not covered here) Process Address Space ID (PASID) Receiver Impedance Lightweight Notification (LN) Protocol Downstream Port Containment (DPC) Enhanced DPC (eDPC) Newer Protocol ECNs Against the PCIe Base Spec (covered here) Separate Refclk Independent SSC (SRIS) Precision Time Measurement (PTM) L1 PM Substates with CLKREQ# M-PCIe (PCIe Over M-PHY) Readiness Notifications (RN) NOP DLLP Errata44 PCIeTechnology SeminarCopyright 2014, PCI-SIG, All Rights Reserved5 Separate RefClk Independent SSC (S)

802.1AS, 802.11v … Required in many applications: Synchronized A/V streaming (802.1 AVB)—studios, autos, and home Instrumentation—distributed data acquisition, logic analyzers Telecom—cell towers synchronized for seamless handoff Industrial Automation/control—robots mustn’t crash into each other or hit people

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