Transcription of Predicting the Phase Noise and Jitter of PLL-Based ...
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Predicting the Phase Noise and Jitter of PLL-Based ...
The Designer s Guide Communitydownloaded from 2002 2015, Kenneth S. Kundert All Rights Reserved1 of 52 Version 4i, 23 October 2015 Two methodologies are presented for Predicting the Phase Noise and Jitter of a PLL-Based frequency synthesizer using simulation that are both accurate and efficient. The methodologies begin by characterizing the Noise behavior of the blocks that make up the PLL using transistor-level RF simulation. For each block, the Phase Noise or Jitter is extracted and applied to a model for the entire paper was written in August 2002.
Predicting the Phase Noise and Jitter of PLL-Based Frequency Synthesizers Introduction 2 of 52 The Designer’s Guide Community www.designers-guide.org Contents 1 Introduction 2
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