Transcription of RI5CY: User Manual - PULP platform
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RI5CY: User Manual - PULP platform
ri5cy : user Manual April 2019 Revision Andreas Traber Michael Gautschi Pasquale Davide Schiavone Micrel Lab and Multitherman Lab University of Bologna, Italy Integrated Systems Lab ETH Z rich, Switzerland ri5cy Rev. Page 2 of 57 Copyright 2018 ETH Zurich and University of Bologna. Copyright and related rights are licensed under the Solderpad Hardware License, Version (the License ); you may not use this file except in compliance with the License. You may obtain a copy of the License at Unless required by applicable law or agreed to in writing, software, hardware and materials distributed under this License is distributed on an AS IS BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.
flip-flops, except for the register file, which can be implemented either with latches or with flip-flops. See Chapter 8 for more details about the register file. The core occupies an area of about 50 kGE when the latch based register file is used. With the FPU, the core area increases to about 90 kGE (30kGE FPU, 10kGE additional register file).
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