Transcription of Section 1 8051 Microcontroller Instruction Set
{{id}} {{{paragraph}}}
Atmel 8051 microcontrollers Hardware10509C 8051 07/06 Section 18051 Microcontroller Instruction SetFor interrupt response time information, refer to the hardware description :1. Operations on SFR byte address 208 or bit addresses 209-215 (that is, the PSW or bits in the PSW) also affect flag that Affect Flag Settings(1)InstructionFlagInstructionFla gCOVACCOVACADDXXXCLR COADDCXXXCPL CXSUBBXXXANL C,bitXMULOXANL C,/bitXDIVOXORL C,bitXDAXORL C,/bitXRRCXMOV C,bitXRLCXCJNEXSETB C1 The Instruction Set and Addressing ModesRnRegister R7-R0 of the currently selected Register internal data location s address.
ADD A, dir [2B] ADDC A, dir [2B] ORL A, dir [2B] ANL A, dir [2B] XRL A, dir [2B] MOV dir, #data [3B, 2C] 6INC @R0 DEC @R0 ADD ... SUBB A,Rn Subtract Register from Acc with borrow 112 SUBB A,direct Subtract direct byte from ... MUL AB Multiply A & B 1 48 DIV AB Divide A by B 1 48 DA A Decimal Adjust Accumulator 112
Domain:
Source:
Link to this page:
Please notify us if you found a problem with this document:
{{id}} {{{paragraph}}}