Transcription of Serial Quad I/O (SQI) Flash Memory - …
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Serial Quad I/O (SQI) Flash Memory - …
2015-2019 Microchip Technology Inc. DS20005119J-page 1 Features single Voltage Read and Write Operations- or Serial Interface Architecture- Nibble-wide multiplexed I/O s with SPI-like Serial command structure - Mode 0 and Mode 3- x1/x2/x4 Serial Peripheral Interface (SPI) Protocol High Speed Clock Frequency- : 104 MHz max- : 80 MHz max Burst Modes- Continuous linear burst- 8/16/32/64 Byte linear burst with wrap-around Superior Reliability- Endurance: 100,000 Cycles (min)- Greater than 100 years Data Retention Low power Consumption:- Active Read current: 15 mA (typical @ 104 MHz)- Standby Current: 15 A (typical) Fast Erase Time- Sector/Block Erase: 18 ms (typ), 25ms (max)- Chip Erase.
Flash® technology. The split-gate cell design and thick-oxide tunneling injector attain better reliability and man-ufacturability compared with alternate approaches. SST26VF064B/064BA significantly improve perfor-mance and reliability, while lowering power consump-tion. These devices write (Program or Erase) with a single power supply of 2.3-3.6V.
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