Serial Vector Format Specification - JTAG

Copyright 1997-1999 ASSET InterTech, 1994 Texas Instruments of this document are granted theright to copy and use the information in thedocument at no cost. Users may not makechanges to the document, or redistributethe document under another E8 March 1999 Part Number: ASSET-SVF-DOCS erial Vector FormatSpecificationASSET InterTech, Vector Format Specification10 MARCH 1999 IIASSET INTERTECH, Vector Format SpecificationASSET INTERTECH, MARCH 1999 table of COMMAND , , HIR (Header Data Register, Header Instruction Register)..10 PIO (Parallel Input/Output)..13 PIOMAP (Parallel Input/Output Map).. , SIR (Scan Data Register, Scan Instruction Register).

Serial Vector Format Specification ASSET I NTER T ECH, INC. III 10 M ARCH 1999 Table of Contents INTRODUCTION .....5

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