PDF4PRO ⚡AMP

Modern search engine that looking for books and documents around the web

Example: tourism industry

Understanding High Speed ADC Testing and …

AN-835. APPLICATION NOTE. One Technology Way Box 9106 Norwood, MA 02062-9106, Tel: Fax: Understanding high Speed ADC Testing and Evaluation by Alex Arrants, Brad Brannon and Rob Reeder SCOPE DYNAMIC TEST HARDWARE SETUP. This document describes both the characterization and production SNR, SINAD, worst spur, and IMD are tested using a hardware test methods used by the high Speed Converter Group of Analog setup similar to that shown in Figure 1. In production tests, the Devices, Inc., to evaluate high Speed analog-to-digital converters test hardware is highly integrated, but the hardware principles (ADCs).

AN-835 Application Note Rev. B | Page 4 of 28 HSC-ADC-EVALC EVALUATION PLATFORM The high speed ADC FIFO evaluation kit (HSC_ADC_EVALC) includes a FPGA-based buffer memory board to capture blocks

Loading..

Tags:

  High, Testing, Understanding, Speed, Understanding high speed adc testing and, The high

Information

Domain:

Source:

Link to this page:

Please notify us if you found a problem with this document:

Spam in document Broken preview Other abuse

Transcription of Understanding High Speed ADC Testing and …

Related search queries