Universal Verification Methodology (UVM) 1.2 Class …

Universal Verification Methodology (UVM) Class ReferenceJune 2014 Copyright 2011 - 2014 Accellera Systems Initiative (Accellera). All rights Systems Initiative Inc., 1370 Trancas Street #163, Napa, CA 94558, Systems Initiative (Accellera) Standards documents are developed within Accellera and the TechnicalCommittees of Accellera. Accellera develops its standards through a consensus development process, approved by itsmembers and board of directors, which brings together volunteers representing varied viewpoints and interests toachieve the final product. Volunteers are not necessarily members of Accellera and serve without Accellera administers the process and establishes rules to promote fairness in the consensus development pro-cess, Accellera does not independently evaluate, test, or verify the accuracy of any of the information contained in of an Accellera Standard is wholly voluntary.

The purpose of the UVM 1.2 Class Reference is to enable verification interoperability throughout the electronics ecosystem. To further that goal, a reference implementation will be made available, along with the UVM 1.2 User’s Guide. While these materials are neither required to implement UVM, nor considered part of the standard, they help

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