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AXI GPIO v2 - Xilinx

AXI GPIO v2 - Xilinx

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Input/Output (GPIO) core provides a general purpose input/output interface to the AXI interface. This 32-bit soft Intellectual Property (IP) core is designed to interface with the AXI4-Lite interface. Features • Supports the AXI4-Lite interface specification • Supports configurable single or dual GPIO channel(s)

  Core, Dual, Xilinx

Download AXI GPIO v2 - Xilinx


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