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AXI Interrupt Controller (INTC) v4 - Xilinx

AXI Interrupt Controller (INTC) v4 - Xilinx

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AXI INTC v4.1 Product Guide 6 PG099 July 15, 2021 www.xilinx.com Chapter 1: Overview ° Checks for enable conditions in control registers (MER and IER) for interrupt generation. ° Resets the interrupt after acknowledge. ° Writes the vector address of the active interrupt in IVR register and enables the IPR register for pending interrupts. Feature Summary ...

  Xilinx, Interrupts

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