全差分运算放大器设计 - big-bit.com
folded-cascode; (c)共源共栅，telescopic。该运算放大器的设计指标要求差分输出摆幅为±4V， 即输出端的所有NMOS 管的VDSAT N, 之和小于0.5V，输出端的所有PMOS 管的VDSAT P, 之和也必须 小于0.5V。对于单级的折叠共源共栅和直接共源共栅两种结构，都比较难达到该要求，因此我
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