Example: stock market
Lecture 21 Power Optimization (Part 2)

Lecture 21 Power Optimization (Part 2)

Back to document page

• Generate budgets for power, performance, area • Generate RTL to match system-level model • Select IP blocks • Analyze and optimize power at module level and chip level • Analyze power implications of test features • Check power against budget for various modes • Synthesize RTL to gates using power optimizations

  Power, Levels

Download Lecture 21 Power Optimization (Part 2)


Information

Domain:

Source:

Link to this page:

Please notify us if you found a problem with this document:

Other abuse

Advertisement

Related search queries