2 Port, USB 2.0 High Speed (480 Mbps) Switch, …

1 Siliconix S17-0074-Rev. G, 23-Jan-171 Document Number: 67786 For technical questions, contact: DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENTARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT Port, USB High Speed (480 Mbps) switch , DPDT Analog SwitchDESCRIPTIONThe DG2730 is 2 port high Speed analog switch optimizedfor USB signal switching. The DG2730 switch isconfigured in DPDT. It handles bidirectional signal flow,achieving a 900 MHz -3 dB bandwidth, a port to portcrosstalk at -36 dB and isolation at -29 dB, measured at240 with high density sub micron CMOS, theDG2730 provide low parasitic capacitance. Signals arerouted with minimized phase distortion and attain a bit to bitskew is as low as 40 DG2730 is designed for a wide range of operatingvoltages, from V to V that can be driven directlyfrom one cell Li-ion battery or 5 V power supply.

2 On-chipcircuitry protects against conditions when either the D+ / D-lines are shorted to the VBUS at the USB port. Additionally,logic control pins (S and OE) can tolerate the presence ofvoltages that are above the supply power rail (V+). Thecontrol logic threshold is guaranteed to be (VIH = V/minup to V+ = V). Latch up current is 500 mA, as perJESD78, and its ESD tolerance exceeds in ultra small miniQFN-10 ( mm x mm mm), it is ideal for portable high Speed mix signalswitching a committed partner to the community and theenvironment, vishay Siliconix manufactures this productwith lead (Pb)-free device termination. The miniQFN-10package has a nickel-palladium-gold device terminationand is represented by the lead (Pb)-free -GE4 suffix to theordering part number.

3 The nickel-palladium-gold deviceterminations meet all JEDEC standards for reflow and a further sign of vishay Siliconix s commitment, theDG2730 is fully Wide operation voltage range Low on-resistance, (typical at 3 V) Low capacitance, CON = pF (typical) 3 dB high bandwidth: 900 MHz (typical) Low bit to bit skew: 40 ps (typical) Low power consumption Low logic threshold: V Power down protection: D+/D- pins can tolerate up V when V+ = 0 V kV ESD protection (HBM) Latch-up current 500 mA per JESD78 Lead (Pb)-free low profile miniQFN-10 ( mm x mmx mm) Material categorization: for definitions of complianceplease see Cellular phones Portable media players PDA Digital camera GPS Notebook computer TV, monitor, and set top boxFUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATIONTop ViewGNDV+SHSD2-OEHSD2+D-HSD1-miniQFN-10L 354 Pin 1: LONG LEADD+HSD1+17621098 Control5xPin 1 Device marking: 5x for DG2730x = Date/Lot Traceability Siliconix S17-0074-Rev.

4 G, 23-Jan-172 Document Number: 67786 For technical questions, contact: DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENTARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT Signals on S, OE, D , HSD1 , HSD2 exceeding V+ will be clamped by internal diodes. Limit forward diode current to maximum All leads welded or soldered to PC Derate mW/ C above 70 beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operationof the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximumrating conditions for extended periods may affect device INFROMATIONTEMP.

5 RANGEPACKAGEPART NUMBER-40 C to 85 CminiQFN-10DG2730DN-T1-GE4 TRUTH TABLEOE (PIN 8)S (PIN 10)FUNCTION01D+ = HSD1+ and D- = HSD1-00D+ = HSD2+ and D- = HSD2-1 XDisconnectPIN DESCRIPTIONSPIN NAMEDESCRIPTIONOEBus switch enableSSelect inputHSD1 , HSD2 , D Data portABSOLUTE MAXIMUM RATINGS (TA = 25 C, unless otherwise noted)PARAMETER LIMITUNIT Reference to GNDV+ to 6VS, OE, D , HSD1 , HSD2 to (V+ + )Current (Any Terminal Except S, OE, D , HSD1 , HSD2 )30mAContinuous Current (S, OE, D , HSD1 , HSD2 ) 250 Peak Current (Pulsed at 1 ms, 10 % duty cycle) 500 Storage Temperature (D suffix)-65 to +150 CPower Dissipation (Packages) bminiQFN-10 c208mWESD (Human body model) (Current injection) Siliconix S17-0074-Rev. G, 23-Jan-173 Document Number: 67786 For technical questions, contact: DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE.

6 THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENTARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT Room = 25 C, Full = as determined by the operating The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this Typical values are for design aid only, not guaranteed nor subject to production Guaranteed by design, not subjected to production Crosstalk measured between (V+ = 3 V)PARAMETER SYMBOL TEST CONDITIONS OTHERWISE UNLESS SPECIFIED TEMP. aLIMITS -40 C to +85 CUNIT MIN. bTYP. cMAX. bAnalog SwitchAnalog Signal Range dVANALOGRDS(on)Full 0-V+VOn-ResistanceRDS(on)V+ = 3 V, ID = 8 mA, VHSD1/2 = Full--9On-Resistance Match d RONV+ = 3 V, ID = 8 mA, VHSD1/2 = Flatness dRON FlatnessV+ = 3 V, ID = 8 mA, VHSD1/2 = 0 V, 1 VRoom-2- switch Off Leakage CurrentIoffV+ = V, VHSD1/2 = V, 3 V, VD = 3 V, VFull-100-100nAChannel On Leakage CurrentIonV+ = V, VHSD1/2 = V, 4 V, VD = 4 V, VFull-200-200 Digital ControlInput Voltage HighVINHV+ = 3 V to + = Voltage LowVINLV+ = 3 V to CurrentIINL or IINHVIN = 0 or V+ Full-1-1 ADynamic CharacteristicsBreak-Before-Make Time dtBBMV+ = 3 V, VD1/2 = V, RL = 50 , CL = 35 pF Room-5-nsFull-5-S, OE Turn-On Time dtONRoom--30 Full--30S, OE Turn-Off Time dtOFFRoom--25 Full--25 Charge Injection dQINJCL = 1 nF, RGEN = 0 , VGEN = 0 VRoom-3-pC Off-Isolation dOIRRV+ = 3 V to V, RL = 50.

7 CL = 5 pF,f = 240 MHz--29-dBCrosstalk d, eXTALK--36-Bandwidth dBWV+ = 3 V to V, RL = 50 , - 3 dB-900-MHzD+/D- On CapacitanceCONV+ = V, OE = 0 V, f = 240 , D2n Off CapacitanceCOFFV+ = OE = V, f = 240 Skew dtSK(O)V+ = 3 V to V, RL = 50 , CL = 5 pF-50-psSkew Off Opposite Transitions of the Same Output dtSK(p)-20-Total Jitter dtJ-200-Power SupplyPower Supply RangeV+ Supply CurrentI+ VIN = 0 V, or V+Full--2 Siliconix S17-0074-Rev. G, 23-Jan-174 Document Number: 67786 For technical questions, contact: DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENTARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT CHARACTERISTICS (TA = 25 C, unless otherwise noted) RON vs. VD and Single Supply VoltageRON vs. Analog Voltage and TemperatureRON vs.

8 Analog Voltage and TemperatureRON vs. Analog Voltage and TemperatureRON vs. Analog Voltage and TemperatureRON vs. Analog Voltage and -On-Resistance ( )VD- Analog Voltage (V)V+ = VV+ = VV+ = VV+ = VV+ = VV+ = VT = 25 CIS= 8 mAD1 ( )VD- Analog Voltage (V)V+ = V+85 C+25 C -40 ( )VD- Analog Voltage (V)V+ = V+85 C+25 C-40 ( )VD- Analog Voltage (V)V+ = V+85 C +25 C -40 ( )VD- Analog Voltage (V)V+ = V+85 C +25 C-40 ( )VD- Analog Voltage (V)V+ = V+25 C+25 C-40 Siliconix S17-0074-Rev. G, 23-Jan-175 Document Number: 67786 For technical questions, contact: DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENTARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT CHARACTERISTICS(TA = 25 C, unless otherwise noted) Supply Current vs.

9 Input Switching FrequencySwitching Threshold vs. Supply VoltageOff-Isolation, V+ = VLeakage Current vs. TemperatureGain vs. Frequency, V+ = VCrosstalk, V+ = 10 000101001K10K100K1M10MI+ -Supply Current ( A)Input Switching Frequency (Hz)V+ = V, V, , & Threshold (V)V+ -Supply Voltage (V)VIHVIL- 100- 90- 80- 70- 60- 50- 40- 30- 20- 100101M10M100M1G10 GOff Isolation (dB)Frequency (Hz)110100100010 000- 40- 20200406080100 Leakage Current (pA)Temperature ( C)IHSD1/2 (OFF)ID (OFF)ID (ON)V+ = V- 8- 7- 6- 5- 4- 3- 2- 101M10M100M1G10 GGain (dB)Frequency (Hz)- 100- 90- 80- 70- 60- 50- 40- 30- 20- 100101M10M100M1G10 GCross Talk (dB)Frequency (Hz) Siliconix S17-0074-Rev. G, 23-Jan-176 Document Number: 67786 For technical questions, contact: DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE.

10 THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENTARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT CIRCUITS Fig. 1 - Switching Time Fig. 2 - Break-Before-Make Interval Fig. 3 - Charge InjectionSwitchInputCL (includes fixture and stray capacitance)V+HSD1 or HSD2 CL35 pFD LogicInputRL50 VOUTGNDV+50 %0 VLogicInputSwitchOutputtONtOFFL ogic "1" = switch onLogic input waveforms inverted for switches that havethe opposite logic VSwitch OutputD x VOUTtr 5 nstf 5 nsVINHVINL =+<<()SVOUTOECL (includes fixture and stray capacitance)HSD2 VHSD1 HSD1 VHSD2 0 VLogicInputSwitchOutputVOHSD1 = HSD2 tr < 5 nstf < 5 ns90 %tDtDD V+GNDV+CL35 pFVORL50 VINLVINHSOEOffOnOnINVOUTVOUTQ = OUT x CLCL = 1 nFRgenVOUTD VIN = 0 - V+OEGNDV+V+IN depends on switch configuration: input polaritydetermined by sense of switch .