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High Stability Resistor Chips (< 0.25 % at Pn at 70 …

CHP, Sfernice Revision: 24-Jan-181 Document Number: 52023 For technical questions, contact: DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENTARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT Stability Resistor Chips (< % at Pn at 70 C during 1000 h) Thick Film TechnologyDESIGN SUPPORT TOOLSV ishay Sfernice thick film Resistor Chips are specially designed to meet very stringent specifications in terms of reliability, Stability < % at Pn at +70 C during 1000 h, homogeneity, reproducibility and conform to specifications NFC 83-240 and MIL-R-55342 to ESCC 4001/026 (see CHPHR datasheet).

CHP, HCHP www.vishay.com Vishay Sfernice For technical questions, contact: sferthinfilm@vishay.com 1000

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Transcription of High Stability Resistor Chips (< 0.25 % at Pn at 70 …

1 CHP, Sfernice Revision: 24-Jan-181 Document Number: 52023 For technical questions, contact: DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENTARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT Stability Resistor Chips (< % at Pn at 70 C during 1000 h) Thick Film TechnologyDESIGN SUPPORT TOOLSV ishay Sfernice thick film Resistor Chips are specially designed to meet very stringent specifications in terms of reliability, Stability < % at Pn at +70 C during 1000 h, homogeneity, reproducibility and conform to specifications NFC 83-240 and MIL-R-55342 to ESCC 4001/026 (see CHPHR datasheet).

2 Sputtered Thin Film terminations, with nickel barrier, are very convenient for high operating conditions. They can withstand thousands of very severe thermal (W/A), N (W/A), and F (one face) types are for solder reflow (W/A) and W (one face) types are for wire bonding, gluing and even high temperature solder CHP: standard passivated version for industrial, professional and military applications Robust terminations Large ohmic value range to 100 M Tight tolerance to % HCHP: for high frequency applications ESCC approved see CHPHR high temperature (245 C) see CHPHT SMD wraparound chip Resistor Halogen-free according to IEC 61249-2-21 definition Withstand moisture resistance test of AEC-Q200 Material categorization.

3 For definitions of compliance please see *This datasheet provides information about parts that are RoHS-compliant and / or parts that are non RoHS-compliant. For example, parts with lead (Pb) terminations are not RoHS-compliant. Please see the information / tables in this datasheet for detailsNotes(1)Shall be read in conjunction with other tables(2)Model CHP0805 being same size than case 0705 with same performances, only codification of CHP0805 remains(3)With special assembly careclick logo to get startedAvailableModelsAvailableAvailable STANDARD ELECTRICAL SPECIFICATIONSMODELSIZERATEDPOWERPnWLIMI TINGELEMENT VOLTAGEVMAX. OVERLOADVOLTAGE VRESISTANCE RANGE (1) TOLERANCE %TEMPERATURE COEFFICIENT ppm/ CUNIT WEIGHT mgCHP0502 to , 1, 2, 5100, 2001 CHP0505 to , 1, 2, 5100, 2003 CHP0603 to , 1, 2, 5100, 2002 CHP0805 (2) to , 1, 2, 5100, 2004 CHP1005 to , 1, 2, 5100, 2005 CHP1206 to , 1, 2, 5100, 2008 CHP1505 to , 1, 2, 5100, 2008 CHP2010 (3) to , 1, 2, 5100, 20026 CHP1020 (3) to , 1, 2, 5100, 20025 CHP2208 to , 1, 2, 5100, 20021 CHP2512 (3) to , 1, 2, 5100, 20042 CHP1010 to , 1, 2, 5100, 20012 CHP, Sfernice Revision: 24-Jan-182 Document Number: 52023 For technical questions, contact: DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE.

4 THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENTARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT in millimetersCASE SIZEABCDE LAND PATTERN (to IPC-7351A) in millimetersCASE (B), (G), and (N)(F) and (W) , Sfernice Revision: 24-Jan-183 Document Number: 52023 For technical questions, contact: DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENTARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT Refer to Application Note Guidelines for vishay Sfernice Resistive and Inductive Components ( ) for recommended reflow profile. Profile #3 appliesNote For temperature up to 215 C please consult vishay SferniceNote(1)Improved performance on requestCHIPS FOR high FREQUENCY APPLICATIONSThe HF performance of flip chip and W/A types can be improved on request.

5 Please ask for HCHPPOWER DERATING CURVEPACKAGINGESD packaging available: Waffle pack and plastic tape and reel (low conductivity). Paper tapes available on request (ESD only).PACKAGING RULESW affle PackCan be filled up to maximum quantity indicated in the table here above, taking into account the minimum order quantity. When quantity ordered exceeds maximum quantity of a single waffle pack, the waffle packs are stacked up on the top of each other and closed by one single get not stacked up waffle pack in case of ordered quantity > maximum number of pieces per package: Please consult vishay Sfernice for specific ordering codeTape and ReelSee Part Numbering information to get the quantity desired by SPECIFICATIONSS ubstrateAluminaTechnologyThick film (ruthenium oxide) < R < 100 M : epoxy coatingR : overglaze protection(no epoxy coating)TerminationsB (W/A):SnPb over nickel barrierfor solder reflowN (W/A): SnAg over nickel barrierfor solder reflowF (Flip chip ).

6 SnAg over nickel barrierfor solder reflowW (one face) and G (W/A) type:gold over nickel barrierfor other applicationsCLIMATIC SPECIFICATIONSO perating temperature range-55 C; +155 CBEST TOL. AND TCR VS. OHMIC VALUE (1)OHMIC VALUE RANGE in TIGHTESTTOLERANCE(%)BESTTCR (ppm/ C)10 < R < % (D)100 (K)5 < R < 10M1 % (F)100 (K)1 < R < % (G)200 (L) < R < % (J)200 (L)SIZEMOQNUMBER OF PIECES PER TAPEWIDTHWAFFLEPACKTAPE AND mm0505100060350000805 400010052211206140150560201020008 mm101010025008 mm22086040008 mm10206010008 mm25125020008 mm07020406080100120140 155020406080100 Ambient Temperature in CRated Power (%)CHP, Sfernice Revision: 24-Jan-184 Document Number: 52023 For technical questions, contact: DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE.

7 THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENTARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT HF PERFORMANCE OF HCHPPOPULAR OPTIONSFor any option it is recommended to consult vishay Sfernice for availability : Enlarged terminations: 0063 For stringent and special power dissipation requirements, the thermal resistance between the resistive layer and the solder joint can be reduced using enlarged terminations chip resistors which are soldered on large and thick copper pads acting as heat sinks (see application note: 53048 Power Dissipation in high Precision vishay Sfernice chip Resistors and Arrays (P Thin Film, PRA Arrays, CHP Thick Film) to order: 0063 (applies to size 1206 / 1505 / 1020 / 2010 / 2512).)

8 000f (MHz)|Z|/RSize 0603 (W/A)100 k 1 M 1 k 10 k 100 200 1 10 000f (MHz)|Z|/RSize 0603 (Flip chip )100 k 1 M 1 k 10 k 100 200 1 10 DIMENSIONS (Option 0063) in millimetersCASE SIZEABCDE view for mountingACCHP, Sfernice Revision: 24-Jan-185 Document Number: 52023 For technical questions, contact: DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENTARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT : MARKINGO ption to order 0013:Marking of ohmic value and tolerance:Sizes: 0805 to 1005: 3 digits marking (according to EIA-96) Sizes: 1206 to 2010: 4 digits marking (same codification than in the ordering procedure) Tolerance indicated by a color to order 0014:Marking of ohmic value:Sizes 0805 to 1005: 3 digits marking (according to EIA-96) Sizes 1206 to 2010.

9 4 digits marking (same codification than in the ordering procedure)No standard marking available for smaller price adder will apply to the unit price of the parts for options 0013 and LAND PATTERN (Option 0063)CASE SIZEDIMENSIONS (IN MILLIMETERS) VALUESAND DRIFTST ermination adhesion5N for 10 s ( % + )< %Resistance to solder heatImmersion 10 s in Sn/Pb 60/40 at +260 C ( % + )< %Rapid temperature change5 cycles ( % + )< %-55 C+155 CClimatic sequencePhase A dry heatPhase B damp heatPhase C cold -55 CPhase D damp heat 5 cycles (1 % + )< %Humidity (steady state)56 days (1 % + )< %Moisture resistanceAEC-Q20085 C / 85 % RH / Pn / 101000 h5 % + Max.

10 < 3 % + Short time Prfor 2 s ( % + )< %Load life1000 h at rated power90 /30 at +70 C1000 h (1 % + )1000 h< %2000 h < %10 000 h< 1 % , Sfernice Revision: 24-Jan-186 Document Number: 52023 For technical questions, contact: DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENTARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT (1)One should use the 3 curves together to get the right performancesMaximum permissible pulse load Pi max. for single pulse (1) Energy for single pulse (1)Maximum permissible pulse voltage Ui max. single pulse (1) Duration t (s)Permissible Pulse Power (W) Duration t (s)Permissible Pulse Energy (J) 000 Pulse Duration t (s)Permissible Pulse Voltage (V) , Sfernice Revision: 24-Jan-187 Document Number: 52023 For technical questions, contact: DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE.


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