N-Channel 60 V (D-S) MOSFET

1 Si1022R. vishay Siliconix N-Channel 60 V (D-S) MOSFET . FEATURES. PRODUCT SUMMARY. Halogen-free According to IEC 61249-2-21. VDS(min.) (V) RDS(on) ( ) VGS(th) (V) ID (mA). Definition 60 at VGS = 10 V 1 to 330 TrenchFET Power MOSFETs Low On-Resistance: . Low Threshold: V. Low Input Capacitance: 30 pF. Fast Switching Speed: 25 ns Low Input and Output Leakage SC-75A. Miniature Package (SOT-416). ESD Protected: 2000 V. G 1. Compliant to RoHS Directive 2002/95/EC. APPLICATIONS. 3 D. Drivers: Relays, Solenoids, Lamps, Hammers, Displays, Memories, Transistors, etc. S 2 Battery Operated Systems Marking Code: E. Solid State Relays Ordering Information: Si1022R-T1-GE3 (Lead (Pb)-free and Halogen-free).

2 BENEFITS. Low Offset Voltage Low-Voltage Operation High-Speed Circuits Low Error Voltage Small Board Area ABSOLUTE MAXIMUM RATINGS (TA = 25 C, unless otherwise noted). Parameter Symbol Limit Unit Drain-Source Voltage VDS 60. V. Gate-Source Voltage VGS 20. TA = 25 C 330. Continuous Drain Currenta ID. TA = 85 C 240 mA. Pulsed Drain Currenta IDM 650. TA = 25 C 250. Power Dissipationa PD mW. TA = 85 C 130. Thermal Resistance, Maximum Junction-to-Ambienta RthJA 500 C/W. Operating Junction and Storage Temperature Range TJ, Tstg - 55 to 150 C. Notes: a. Surface mounted on FR4 board, power applied for t 10 s. Document Number: 71331 S10-2687-Rev.

3 F, 22-Nov-10 1. Si1022R. vishay Siliconix SPECIFICATIONS (TJ = 25 C, unless otherwise noted). Parameter Symbol Test Conditions Min. Typ. Max. Unit Static Drain-Source Breakdown Voltage VDS VGS = 0 V, ID = 10 A 60. V. Gate-Threshold Voltage VGS(th) VDS = VGS, ID = mA 1 VDS = 0 V, VGS = 10 V 150. Gate-Body Leakage IGSS TJ = 85 C 500. VDS = 0 V, VGS = 5 V 20 nA. VDS = 50 V, VGS = 0 V 10. Zero Gate Voltage Drain Current IDSS TJ = 85 C 100. VDS = 60 V, VGS = 0 V 1 A. VDS = 10 V, VGS = V 500. On-State Drain Currenta ID(on) mA. VDS = V, VGS = 10 V 800. VGS = V, ID = 200 mA TJ = 125 C Drain-Source On-State Resistancea RDS(on).

4 VGS = 10 V, ID = 500 mA TJ = 125 C a gfs VDS = 10 V, ID = 200 mA 100 mS. Forward Transconductance Diode Forward Voltagea VSD VGS = 0 V, IS = 200 mA V. Dynamicb Input Capacitance Ciss 30. Output Capacitance Coss VDS = 25 V, VGS = 0 V, f = 1 MHz 6 pF. Reverse Transfer Capacitance Crss Gate Charge Qg VDS = 10 V, ID = 250 mA, VGS = V nC. Switchingb, c Turn-On Time t(on) VDD = 30 V, RL = 150 , 25. ns Turn-Off Time t(off) ID = 200 mA, VGEN = 10 V, Rg = 10 35. Notes: a. Pulse test; pulse width 300 s, duty cycle 2 %. b. For DESIGN AID ONLY, not subject to production testing. c. Switching time is essentially independent of operating temperature.

5 Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Document Number: 71331. 2 S10-2687-Rev. F, 22-Nov-10. Si1022R. vishay Siliconix TYPICAL CHARACTERISTICS (TA = 25 C, unless otherwise noted). 1200. 6V. VGS = 10 V thru 7 V TJ = - 55 C. 5V. 900. I D - Drain Current (mA). I D - Drain Current (A).

6 25 C. 125 C. 600. 4V. 300. 3V. 0. 0 1 2 3 4 5 0 1 2 3 4 5 6. VDS - Drain-to-Source Voltage (V) VGS - Gate-to-Source Voltage (V). Output Characteristics Transfer Characteristics 50. VGS = 0 V. f = 1 MHz 40. RDS(on) - On-Resistance ( ). C - Capacitance (pF). 30. VGS = V Ciss 20. VGS = 10 V. Coss 10. Crss 0. 0 200 400 600 800 1000 0 5 10 15 20 25. ID - Drain Current (mA) VDS - Drain-to-Source Voltage (V). On-Resistance vs. Drain Current Capacitance 7 VDS = 10 V VGS = 10 V at 500 mA. 6. V GS - Gate-to-Source Voltage (V). ID = 250 mA RDS(on) - On-Resistance 5. (Normalized). VGS = V. 4. at 200 mA. 3. 2. 1. 0 - 50 - 25 0 25 50 75 100 125 150.

7 Qg - Total Gate Charge (nC) TJ - Junction Temperature ( C). Gate Charge On-Resistance vs. Junction Temperature Document Number: 71331 S10-2687-Rev. F, 22-Nov-10 3. Si1022R. vishay Siliconix TYPICAL CHARACTERISTICS (TA = 25 C, unless otherwise noted). 1000 5. VGS = 0 V. 4. RDS(on) - On-Resistance ( ). I S - Source Current (A). 100. 3. TJ = 125 C. 2 ID = 500 mA. 10 TJ = 25 C. ID = 200 mA. 1. TJ = - 55 C. 1 0. 0 0 2 4 6 8 10. VSD - Source-to-Drain Voltage (V) VGS - Gate-to-Source Voltage (V). Source-Drain Diode Forward Voltage On-Resistance vs. Gate-Source Voltage 3. ID = 250 A. VGS(th) Variance (V). 2. Power (W). - - 1.

8 TA = 25 C. - - 0. - 50 - 25 0 25 50 75 100 125 150 1 10 100 600. TJ - Junction Temperature ( C) Time (s). Threshold Voltage Variance Over Temperature Single Pulse Power, Junction-to-Ambient 2. 1. Normalized Effective Transient Duty Cycle = Thermal Impedance Notes: PDM. t1. t2. t1. 1. Duty Cycle, D =. t2. 2. Per Unit Base = RthJA = 500 C/W. 3. TJM - T A= PDMZthJA(t). Single Pulse 4. Surface Mounted 10 - 4 10 - 3 10 - 2 10- 1 1 10 100 600. Square Wave Pulse Duration (s). Normalized Thermal Transient Impedance, Junction-to-Ambient vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations.

9 Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see Document Number: 71331. 4 S10-2687-Rev. F, 22-Nov-10. Package Information vishay Siliconix SC-75A: 3 Leads D bbb L2. 1 2. D. D. e2 2X. D. A. 3. B1(b1). L. 3. L1. e1. 3 E/2. 1. 2 E1 E. 1 1. 1 2. bbb D. C. 2X. B. B. bbb C. D. 3 4 2X. B. e3. 2XB1 B1. b1. ddd M C A B D. With Tin Planting C. c1. Base Metal Section B-B 5. A2. A. bbb D. C. 4X. Seating Plane D. A1. DWG: 5868. Notes MILLIMETERS. Dimensions in millimeters will govern.

10 DIM. NOTE. MIN. NOM. MAX. D does not include mold flash, protrusions or gate burrs. Mold flash protrusions or gate burrs shall not exceed A - - mm per end. Dimension E1 does not include Interlead flash A1 - or protrusion. Interlead flash or protrusion shall not exceed mm per side. A2 D and E1 are determined at the outmost extremes of B1 - 5. the plastic body exclusive of mold flash, tie bar burrs, gate burrs and interlead flash, but including any mismatch between the top b1 - and bottom of the plastic body. c - 5. A, B and D to be determined mm from the lead tip. positions are shown for reference only. c1 - 5. dimensions apply to the flat section of the lead between D 1, 2.