Transcription of CCLD-033 5 7mm SMD LVDS Clock Oscillator - Crystek
1 C12730 Commonwealth Drive Fort Myers, Florida 33913 Phone: 239-561-3311 800-237-3061 Fax: 239-561-1025 7 mm SMD, , LVDSCCLD-033 ModelCCLD-033 5 7mm SMDLVDS Clock OscillatorDate: 13-Feb-2017 Rev: RPage 1 of 3 Model CCLD-033 is a MHz to MHz LVDSC lock Oscillator operating at Volts. The Oscillator utilizesa High Q Third Overtone crystal design providing very lowJitter and Phase Noise. No Sub-Harmonics are present inthe Output :Digital VideoSONET/SDH/DWDMS torage Area NetworksBroadband AccessEthernet, Gigabit Ethernet5 7mm SMDC12730 Commonwealth Drive Fort Myers, Florida 33913 Phone: 239-561-3311 800-237-3061 Fax: 239-561-1025 7 mm SMD, , LVDSCCLD-033 ModelCCLD-033 5 7mm SMDLVDS Clock OscillatorDate: 13-Feb-2017 Rev: RPage 2 of 3 Frequency Range: Frequency Stability Options(ppm):Temperature Range:(Option M)(Option X)Storage: Input Voltage:Input Current:Standby Current:Output:Symmetry:Rise/Fall Time:Load:Logic:Output Voltage LevelsDifferential Output Voltage:Disable Time.
2 Start-up Time:Phase Jitter: 12kHz~80 MHzPhase Noise: (See Plot Below)Sub-harmonics:Aging: MHz to MHz 20, 25, 50, 100(standard) 0 C to +70 C-20 C to +70 C-40 C to +85 C-45 C to 90 Max30uA MaxDifferential LVDS45/55% Max @ zero crossing point1ns Max (20% to 80%)100 Ohms Connected between OUT and COUT 0 = Min, Typical 1 = Typical, Max247mV Min, 454mV Max200ns Max10ms Typical, 1ps RMS MaxNone<3ppm 1st year, <1ppm every year thereafterTypical Phase Noise PlotSpecifications subject to change without Commonwealth Drive Fort Myers, Florida 33913 Phone: 239-561-3311 800-237-3061 Fax: 239-561-1025 7 mm SMD, , LVDSCCLD-033 ModelCCLD-033 5 7mm SMDLVDS Clock OscillatorDate: 13-Feb-2017 Rev: RPage 3 of 3 RECOMMENDED REFLOW SOLDERING PROFILE217 C200 C260 C150 C90 Secs.
3 C/Sec Secs. Minutes C for 10 Secs. Temperature ZoneRamp-Down6 : Reflow Profile with 240 C peak also :Solderability:Vibration:Solvent Resistance:Resistance to Soldering Heat:Thermal Shock:Moisture Resistance:MIL-STD-883, Method 2002, Condition BMIL-STD-883, Method 2003 MIL-STD-883, Method 2007, Condition AMIL-STD-202, Method 215 MIL-STD-202, Method 210, Condition I or JMIL-STD-883, Method 1011, Condition AMIL-STD-883, Method 1004 Mechanical:Environmental:Dimensions inches (mm)All dimensions are Max unless otherwise Typ( Typ) ( ) ( ) ( )#1#2#3#4#5# Bypass Capacitor RecommendedSUGGESTED PAD SQ( ) ( ) ( )PINC onnection123456 Enable/DisableN/CGNDO utputComp ( ) ( )Part Number FrequencyDC Lot CodeDenotes pad Fvia togroundCrystek Part Number Guide#1 Crystek LVDS Osc.
4 #2 Model 033#3 Temp Range: Blank = 0/70 C, M = -20/70 C, X = -40/85 C#4 Stability: (see Table 1)#5 Frequency in MHz: 3 or 6 decimal placesExample:CCLD 033X 50 , 40/85 C, 50ppm, MHz Blank 100ppm 50 50ppm 25 25ppm 20* 20ppm*not available in -40/85 Stability IndicatorTable 1 CCLD - 033 X - 50 - #1#5#3#2# ( )Function pin 1 Output pin Open or N/C"1" level Vdd Min"0" level Vdd MaxActiveActiveHigh Z Enable/Disabl
