Voltage Divider
Found 6 free book(s)
Basic Calculation of a Boost Converter's Power Stage (Rev. C)
www.ti.comOutput Voltage Setting www.ti.com 5 Output Voltage Setting Almost all converters set the output voltage with a resistive divider network (which is integrated if they are fixed output voltage converters). With the given feedback voltage, VFB, and feedback bias current, IFB, the voltage divider can be calculated. Figure 2.
Lecture 19 - MIT
web.mit.eduVoltage divider at input: Voltage divider at output: Loaded voltage gain: v in=R vs Rin +Rs vout =RL Avovin Rout +RL vout vs = Rin Rin +RS Avo RL RL +Rout +-vin +-Avovin vout Rout +-Rin Rs vs +-RL unloaded circuit output loading input loading. 6.012 Spring 2007 Lecture 19 8 Small-signal voltage gain Avo: draw small-signal
High-voltage resonant controller - STMicroelectronics
www.st.comThe pin is to be connected to the high-voltage input bus with a resistor divider to perform either AC or DC (in systems with PFC) brownout protection. A voltage below 1.25 V shuts down (not latched) the IC, lowers its consumption and discharges the soft-start capacitor. IC’s operation is re-enabled (soft-started) as the voltage exceeds 1.25 V.
Single/Dual Digital Potentiometer with SPI Interface
ww1.microchip.comSchmitt Trigger High-Level Input Voltage V IH 0.7VDD —— V Schmitt Trigger Low-Level Input Voltage V IL — — 0.3VDD V Hysteresis of Schmitt Trigger Inputs VHYS —0.05VDD — Low-Level Output Voltage VOL — — 0.40 V IOL = 2.1 mA, VDD = 5V High-Level Output Voltage VOH VDD - 0.5 — — V IOH = -400 µA, VDD = 5V
Thevenin equivalent circuits - Iowa State University
tuttle.merc.iastate.eduJun 10, 2014 · The open-circuit voltage / short-circuit current approach can be used to calculate the Thevenin equivalent for a known circuit. Consider the circuit from slide 4: + – V S R 1 R 2 I S 9V 6 mA 1.5 k! 3 k! Open-circuit voltage – Use whatever method you prefer. We’ll use node voltage in this case. + – V S R 1 R 2 I S v a + – v oc YRF= YD ...
Si5345/44/42 Rev D Data Sheet - Silicon Labs
www.skyworksinc.comSi5345/44/42 Rev D Data Sheet 10-Channel, Any-Frequency, Any-Output Jitter Attenua-tor/Clock Multiplier These jitter attenuating clock multipliers combine fourth-generation DSPLL™ and MultiSynth™ technologies to enable any-frequency clock generation and jitter attenu- ation for applications requiring the highest level of jitter performance.