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LAB EXERCISE 7.1 UP/DOWN Counters Objectives Materials
www.csun.eduUse PB2 as the clock input, Ll and L2 as the 1 and 2 outputs. ... We will study both up and down counters. LD-2 Logic Designer : 74LS76 Dual J-K Flip-flops with Preset and Clear . Jumper Wires . TIL Data Book . Procedure . 1. Place a 74LS76 on the LD-2 breadboard and wire the
Synchronous 4-Bit Up/Down Counters (Dual Clock With Clear ...
www.ti.comsn54192, sn54193, sn54ls192, sn54ls193, sn74192, sn74193, sn74ls192, sn74ls193 synchronous 4-bit up/down counters (dual clock with clear) sdls074 − december 1972 − revised march 1988