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Modeling Jitter in PLL-based Frequency Synthesizers
www.designers-guide.orgModeling Jitter in PLL-based Frequency Synthesizers Jitter 4 of 32 The Designer’s Guide Community www.designers-guide.org ffb to be equal to fref.Given a reference frequency fin, the frequency at the output of the PLL is.(1) By choosing the frequency divide ratios and the input frequency appropriately, the syn-