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12-Bit DAC with EEPROM Memory in SOT-23-6

2007 Microchip Technology 1 MCP4725 Features 12-Bit Resolution On-Board Non-Volatile Memory ( EEPROM ) LSB DNL (typical) External A0 Address Pin Normal or Power-Down Mode Fast Settling Time of 6 s (typical) External Voltage Reference (VDD) Rail-to-Rail Output Low Power Consumption Single-Supply Operation: to I2 CTM Interface:- Eight Available Addresses- Standard (100 kbps), Fast (400 kbps), and High-Speed ( Mbps) Modes Small 6-lead SOT-23 Package Extended Temperature Range: -40 C to +125 CApplications Set Point or Offset Trimming Sensor Calibration Closed-Loop Servo Control Low Power Portable Instrumentation PC Peripherals Data Acquisition Systems Block DiagramDESCRIPTIONThe MCP4725 is a low-power, high accuracy, singlechannel, 12-Bit buffered voltage output Digital-to-Ana-log Convertor (DAC) with non-volatile Memory ( EEPROM ).

Oct 05, 2007 · The MCP4725 has a two-wire I2C™ compatible serial interface for standard (100 kHz), fast (400 kHz), or high speed (3.4 MHz) mode. The MCP4725 is an ideal DAC device where design simplicity and small footprint is desired, and for applica-tions requiring the DAC device settings to be saved during power-off time.

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Transcription of 12-Bit DAC with EEPROM Memory in SOT-23-6

1 2007 Microchip Technology 1 MCP4725 Features 12-Bit Resolution On-Board Non-Volatile Memory ( EEPROM ) LSB DNL (typical) External A0 Address Pin Normal or Power-Down Mode Fast Settling Time of 6 s (typical) External Voltage Reference (VDD) Rail-to-Rail Output Low Power Consumption Single-Supply Operation: to I2 CTM Interface:- Eight Available Addresses- Standard (100 kbps), Fast (400 kbps), and High-Speed ( Mbps) Modes Small 6-lead SOT-23 Package Extended Temperature Range: -40 C to +125 CApplications Set Point or Offset Trimming Sensor Calibration Closed-Loop Servo Control Low Power Portable Instrumentation PC Peripherals Data Acquisition Systems Block DiagramDESCRIPTIONThe MCP4725 is a low-power, high accuracy, singlechannel, 12-Bit buffered voltage output Digital-to-Ana-log Convertor (DAC) with non-volatile Memory ( EEPROM ).

2 Its on-board precision output amplifierallows it to achieve rail-to-rail analog output DAC input and configuration data can beprogrammed to the non-volatile Memory ( EEPROM ) bythe user using I2C interface command. The non-volatilememory feature enables the DAC device to hold theDAC input code during power-off time, and the DACoutput is available immediately after power-up. Thisfeature is very useful when the DAC device is used asa supporting device for other devices in the device includes a Power-On-Reset (POR) circuit toensure reliable power-up and an on-board chargepump for the EEPROM programming voltage. TheDAC reference is driven from VDD directly. Inpower-down mode, the output amplifier can be config-ured to present a low, medium, or high resistance out-put MCP4725 has an external A0 address pin.

3 This A0pin can be tied to VDD or VSS of the user s MCP4725 has a two- wire I2C compatible serialinterface for standard (100 kHz), fast (400 kHz), or highspeed ( MHz) MCP4725 is an ideal DAC device where designsimplicity and small footprint is desired, and for applica-tions requiring the DAC device settings to be savedduring power-off device is available in a small 6-pin TypeResistivePower-onResetChargePumpEEPR OMI2C Interface LogicInputRegisterDAC RegisterOpAmpPower-downControlVDDVSSSCLS DAVOUTA0 String DAC 3 VDDSCLSDA VSSA0 SOT-23-6 VOUT2145612-Bit Digital-to-Analog Converter with EEPROM Memory in SOT-23-6 MCP4725DS22039C-page 2 2007 Microchip Technology CHARACTERISTICSA bsolute Maximum Ratings inputs and outputs to VDD+ at Input Pins .. 2 mACurrent at Supply Pins.

4 50 mACurrent at Output Pins .. 25 mAStorage Temperature ..-65 C to +150 CAmbient Temp. with Power Applied ..-55 C to +125 CESD protection on all pins .. 6kV HBM, 400V MMMaximum Junction Temperature (TJ) .. +150 C Notice: Stresses above those listed under Maximum rat-ings may cause permanent damage to the is a stress rating only and functional operation ofthe device at these or any other conditions above thoseindicated in the operation listings of this specification isnot implied. Exposure to maximum rating conditions forextended periods may affect device reliabilityELECTRICAL CHARACTERISTICSE lectrical Specifications: Unless otherwise indicated, all parameters apply at VDD = + to , VSS = 0V,RL = 5 k from VOUT to VSS, CL = 100 pF, TA = -40 C to +125 C. Typical values are at +25 Sym Min Typ Max Units Conditions Power Requirements Operating Voltage V Supply Current ID 210400 A Digital input grounded, out-put unloaded.

5 Code = 000hPower-Down CurrentIDDP A VDD = ThresholdVPOR 2 VDC AccuracyResolution n12 Bits Code Range = 000h to FFFhINL Error INL 2 LSB Note 1 DNL DNL LSB Note 1 Offset Error VOS of FSR Code = 000h Offset Error Drift VOS/ C 1 ppm/ C-45 C to +25 C 2 ppm/ C+25 C to +85 CGain Error GE 2 % of FSR Code FFFh, not including offset errorGain Error Drift GE/ C -3 ppm/ C Output Amplifier Phase Margin pM 66 Degree( ) CL = 400 pF, RL = Capacitive Load Stability CL 1000 pF RL = 5 k , Note 2 Slew Rate SR V/ s Short Circuit Current ISC 15 24 mA VDD = 5V, VOUT = GroundedOutput Voltage Settling Time TS 6 sNote 3 Note 1:Test Code Range: 100 to :This parameter is ensure by design and not 100% :Within 1/2 LSB of the final value when code changes from 1/4 to 3/4 (400h to C00h) of :Logic state of external address pin (A0 pin).

6 2007 Microchip Technology 3 MCP4725 Power Up Time TPU sVDD = 5V 5 sVDD = 3 VComing out of Power-down mode, started from falling edge of ACK pulse in I2C Output Impedance ROUT 1 Normal mode (VOUT to VSS) 1 k Power-Down Mode 1(VOUT to VSS) 100 k Power-Down Mode 2(VOUT to VSS) 500 k Power-Down Mode 3(VOUT to VSS) Dynamic Performance Major Code Transition Glitch 45 nV-s 1 LSB change around major carry (800h to 7 FFh) (Note 2) Digital Feedthrough <10 nV-sNote 2 Digital Interface Output Low Voltage VOL V IOL = 3 mA Input High Voltage(SDA and SCL Pins)VIH V Input Low Voltage(SDA and SCL Pins)VIL Input High Voltage(A0 Pin)VA0-Hi Note 4 Input Low Voltage(A0 Pin)VA0-IL 4 Input Leakage ILI 1 A SCL = SDA = A0 = VSS or SCL = SDA = A0 = VDDPin Capacitance CPIN 3 pF Note 2 EEPROM EEPROM Write Time TWRITE 2550msEEPROM Write time for 14 bitsData Retention 200 YearsAt +25 C, (Note 2)Endurance1 Million CyclesAt +25 C, (Note 2)ELECTRICAL CHARACTERISTICS (CONTINUED)Electrical Specifications: Unless otherwise indicated, all parameters apply at VDD = + to , VSS = 0V,RL = 5 k from VOUT to VSS, CL = 100 pF, TA = -40 C to +125 C.

7 Typical values are at +25 Sym Min Typ Max Units Conditions Note 1:Test Code Range: 100 to :This parameter is ensure by design and not 100% :Within 1/2 LSB of the final value when code changes from 1/4 to 3/4 (400h to C00h) of :Logic state of external address pin (A0 pin).MCP4725DS22039C-page 4 2007 Microchip Technology CHARACTERISTICS Electrical Specifications: Unless otherwise indicated, VDD= + to + , VSS= RangesSpecified Temperature RangeTA-40 +125 COperating Temperature RangeTA-40 +125 CStorage Temperature RangeTA-65 +150 CThermal Package ResistancesThermal Resistance, 6L-SOT-23 JA 190 C/W 2007 Microchip Technology PERFORMANCE CURVESNote: Unless otherwise indicated, TA = +25 C, VDD = + , VSS = 0V, RL = 5 k to VSS, CL = 100 2-1:DNL vs.

8 Code (VDD = ).FIGURE 2-2:DNL vs. Code and Temperature (TA = -40 C to +125 C).FIGURE 2-3:DNL vs. Code (VDD = ).FIGURE 2-4:DNL vs. Code and Temperature (TA = -40 C to +125 C).FIGURE 2-5:INL vs. 2-6:INL vs. Code and Temperature (VDD = ).Note:The graphs and tables provided following this note are a statistical summary based on a limited number ofsamples and are provided for informational purposes only. The performance characteristics listed hereinare not tested or guaranteed. In some graphs or tables, the data presented may be outside the specifiedoperating range ( , outside specified power supply range) and therefore, outside the warranted (LSB) (LSB)VDD = (LSB) (LSB)VDD = (LSB) (LSB)+25C+125C- 40C+85 CMCP4725DS22039C-page 6 2007 Microchip Technology : Unless otherwise indicated, TA = +25 C, VDD = + , VSS = 0V, RL = 5 k to VSS, CL = 100 2-7:INL vs.

9 Code and Temperature (VDD = ).FIGURE 2-8:Zero Scale Error vs. Temperature (Code = 000d).FIGURE 2-9:Full-Scale Error vs. Temperature (Code = 4095d).FIGURE 2-10:Output Error vs. Temperature (Code = 4000d).FIGURE 2-11:IDD vs. (LSB) TA = -40 C TA = 25 C TA = 85 C TA = 125 C+125 C- 40 C+85 C+25 C-10123-40 -25 -10520 35 50 65 80 95 110 125 Temperature ( C)Zero Scale Error (mV)VDD = = -25 -10 520 35 50 65 80 95 110 125 Temperature ( C)Full-Scale Error (mV)VDD = = -25 -10 520 35 50 65 80 95 110 125 Temperature ( C)Output Error (mV)VDD = = -25 -10 520 35 50 65 80 95 110 125 Temperature( C)IDD(uA)VDD = = 5V 2007 Microchip Technology 7 MCP4725 Note: Unless otherwise indicated, TA = +25 C, VDD = + , VSS = 0V, RL = 5 k to VSS, CL = 100 2-12:IDD Histogram.

10 FIGURE 2-13:IDD 2-14:Offset Error vs. Temperature and 2-15:VOUT vs. Resistive 2-16:Source and Sink Current 2-17: VIN High Threshold vs. Temperature and ( A)OccuranceVDD = 5 VVDD = ( A) -25 -10 520 35 50 65 80 95 110 125 Temperature ( C)Offset Error (mV) Resistance (k )VOUT (V)VDD = 5 VCode = FFFh01234560481216 ISOURCE/SINK(mA)VOUT(V)Code = FFFhCode = 000hVDD = -25 -10 520 35 50 65 80 95 110 125 Temperature ( C)VIH Threshold (V)VDD = = = 8 2007 Microchip Technology : Unless otherwise indicated, TA = +25 C, VDD = + , VSS = 0V, RL = 5 k to VSS, CL = 100 2-18:VIN Low Threshold vs. Temperature and 2-19:Full-Scale Settling 2-20:Full-Scale Settling 2-21:Half-Scale Settling 2-22:Half-Scale Settling 2-23:Code Change -25 -10 520 35 50 65 80 95 110 125 Temperature (C)VIL Threshold (V)VDD = = = Code Change: 000h to FFFhVOUT(2V/Div)CLKTime (2 s/Div)Full-Scale Code Change: FFFh to 000hVOUT(2V/Div)CLKTime (2 s/Div)Half-Scale Code Change: 000h to 7 FFhVOUT(2V/Div)CLKTime (2 s/Div)VOUT(2V/Div)CLKTime (2 s/Div)Half-Scale Code Change: 7 FFh to 000hCode Change: 800h to 7 FFhVOUT(20 mV/Div)Time (1 s/Div) 2007 Microchip Technology 9 MCP4725 Note: Unless otherwise indicated, TA = +25 C, VDD = + , VSS = 0V, RL = 5 k to VSS, CL = 100 2-24.


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