3. VHDL 문법기초 한동일 - dasan.sejong.ac.kr

1 VHDL VHDL 3. VHDL VHDL . VHDL VHDL . VHDL . VHDL .. (literal) .. (type) . (type) .. 2/73 . VHDL VHDL (reserved word) (identifier) (identifier) (literal) () (comment) (operator) (type)3/73 VHDL VHDL (graphic code) (g p) ISO/IEC 8859-1: 1987, Information Processing - 8-bit Single-Byte Coded Graphic Character Sets -- Part 1: Latin Alphabet No. 1. (format effector) (horizontal tab)() (vertical tab) (carriage return) (line feed) (line feed) (form feed) -- /* */ (2008 )4/73() .191 191 5/73 6/73 VHDL VHDL VHDL 7 VHDL VHDL 8 VHDL (separotor) (delimiter) (reserved word) (reserved word) (identifier) (literal) (literal) (comment)9/73.

2 (t) (separator) (space), (format effector), (End of line) 10/73. (d li it ) (delimiter) (single delimiter) (compound delimiter) &'(AmpersandApostrophe, tickLftth , minus signDot, point, periodSl h di idlid>`|Greater-than signGrave accentVti lli (b )()*+Left parenthesisRight parenthesisAsterisk, multiplyPlus sign/:;<Slash, divide, solidusColonSemicolonLessthan sign|[]?Vertical line(bar)Left square bracketRight square bracketQuestion mark11/73+,Plus signComma<=Less-than signEquals sign?@Question markCommencial at. (d li it ) (delimiter) =>:=>=ArrowVariable assignmentGreater than or equal**/=<=Double star, exponentiationInequality, not equalLess than or equal, signal assignment<>?)

3 =?<?BoxMatching equalityMatching less than M t hitth???/=?<=?Condition conversionMatching inequalityMatching less than or equalMthit thl?> <<Matching greater than Double less than?>=>>Matching greater than or equalDouble greater than12/73 (dd) (reserved word) 115 (2008 ) 13/73 : 10762008 : 1076-2008 absaccessafteraliasallandarchitecturearr ayassertassumeassume_guaranteeattributeb eginblockbodybufferbuscasecomponentconfi gurationdf ldidlconstantcontextcoverdefaultdisconne ctdowntoelseelsifendentityexitfairnessfi leforforcefunctiongenerategenericgroupgu ardedifgggpgimpureininertialinoutislabel librarylinkageliteralloopmapmodnandnewll fnextnornotnullofonopenorothersoutpackag eparameterportpostponedprocedureprocessp ropertyprotectedpurerangerecordpppp yppgregisterrejectreleaseremreportrestri ct_guaranteerestrictreturnrolrorselectse quenceseverityisignalsharedslasllsrasrls trongsubtypethentotransporttypeunaffecte dunitsuntilusevariablevmodevpropvunitwai t14/73ppwhenwhilewithxnorxor (id tifi ) (identifier) , ( ) ) (basic identifier) (basic identifier) (extended identifier)15/73.

4 BNF BNF identifier ::= basic_identifier | extended_identifierbasic_identifier ::= letter { [ underline ] letter_or_digit}{__g}letter_or_digit ::= letter | digit__g|gletter ::= upper_case_letter | lower_case_letterextended_identifier ::= \ graphic_character { graphic_character } \16/73 COUNT, A, DCT, FrameCount X9, ADD1, Pentium4, P4C1 RSTFCtADD A B RST_n, Frame_Count, ADD_A_B 9X 9X : _carry_out : ADD A B : ADD__A_B : DCT_ : \ELSE\\200$\\ADD A B\\DCT\\74LS32\17/73 \ELSE\, \200$\, \ADD__A_B\, \DCT_\, \74LS32\. (lit l) (literal) constantHTOTAL_WIDTH : integer := 512;constantMAX_BIN : string := B"1111_1111_1111";constantMAX_HEX : BIT_VECTOR := X"FFF";typeVOLTAGE_RANGE is range ; 512 B"1111_1111_1111" X"FFF" -15 018/73 (lit l) (literal) decimal literalabstract literalbased literalreal literalliteralcharacter literalstring literalinteger literalstring literalbit string literal19/73g (bt tlit l) (abstract literal) (real literal) (integer literal) (decimal literal) (b d li l) (based literal) 0 20/73.

5 BNF BNF decimal_literal ::= integer [ . integer ] [ exponent ]integer ::= digit { [ underline ] digit }exponent ::= E [ + ] integer | E integer 15, 0, 1E6, 123_456_789 , , +6, , constantHALF PERIOD : time :=50E3ns ;21/73constant HALF_PERIOD : time := ;. BNF BNF based_literal ::= base # based_integer [ . based_integer ] # [ exponent ]base ::= integerbased_integer ::= extended_digit { [ underline ] extended_digit }extended_digit ::= digit | letterexponent ::= E [ + ] integer | E - integer 2 ~ 16 2 2#1111_1110#, 2# #E11 16 22/73 16#FE#, 16# #E+2. (h t lit l) BNF (character literal) BNF character_literal ::= 'graphic_character' 191 a A @ 1 a, A, @, , , 1 a ab 23/73 a, ab.

6 (ti lit l) BNF (string literal) BNF string_literal ::= "{graphic_character}" & a , , -- 1 ifld/li tt 24/73 . (bit t i lit l) BNF (bit string literal) BNF bit_string_literal ::= [ integer ] base_specifier "[bit_value]"bit_value ::= graphic_character { [ underline ] graphic_character }base_specifier ::= B | O | X | UB | UO | UX | SB | SO | SX | D 2, 8, 16 0~9, A~F, U , X , 0 , 1 , Z , W , L , H , - ( ) Integer : base specifier B : , O : 8 , X : 16 25/73 U : std_ulogic, S : std_logic, D : . bit string literallengthequivalent valuebit string literallengthequivalent valueB""B"1111 1111"08empty bit string"11111111"B"1111_1111"X"FF"O"77"88 6"11111111"B"1111_1111"B"111_111"X"77"B" XXXX_10HL"X"F-"888B"0111_0111""XXXX10HL" B"1111----"12X"F-"12SX"XXA0"81212_B"0000 _1111_---- B"XXXX_1010_0000" 26/73 (t) (comment) VHDL VHDL (single-line comment) (delimited comment) -- -- -- (vertical tab), (carriage return)27/73 (line feed), (form feed).

7 /* */ /* */ /* -- VHDL , VHDL ---- The first two hyphens start the ;--End of processend; --End of processr_image := 255; /* Comments /* do not nest */-- 28/73-- .. VHDL VHDL SABllfi S <= A xorB; -- calculate sum of two input , , , S : <= : A : xor : B: B : ; : -- : 29/73 (operator) (operator) (t) ? (operator) ? (expression) 8 , operator classoperatorsprecedencecondition??lowconditionlogicalrelationalshift??and | or | nand | nor | xor | xnor= | /= | < | <= | > | >= | ?= | ?/= | ?< | ?<= | ?> | ?>=sll|srl|sla|sra|rol|rorlowshiftadding signmultiplyingsll| srl| sla| sra| rol| ror+ | - | &+ | -* | / | mod | rem30/73py gmiscellaneous|||** | abs | nothigh.

8 (operator) (operator) ( ditit ) (condition operator) (unary operator) IEEE Standard 1076-2008 function "??" (anonymous: BIT) return BOOLEAN; bit boolean 1 TRUE 0 FALSE 31/73 (operator) (operator) (l i lt ) (logical operator) bit, boolean (standard ) nand, nor 32/73 (logical operator) (logical operator) signala, b, c, b1, b2, b3, b4, b5, b6, b7, b8 : boolean;-- b5 <= a nandb nandc; -- b6 <= a norb norc; -- b7 <= a andb orc ; -- -- b1 <= a andb andc andd ;b2 <= a orb orc;b3 <= a xorb xorc xord;b4 <= a xnorb xnorc;b5 <= (a nandb) nandc;33/73b7 <= a and(b orc) ; (operator) (operator) (lti l t) (relational operator) bl boolean (matching relational operator) IEEE Standard 1076-2008 li lrelational operatoroperatorsrelational matching relational= | /= | < | <= | > | >= | ?

9 =|?/=|?<|?<=|?>|?>=34/73matching relational? | ?/ | ?< | ?< | ?> | ?>. 35/73 (operator) (operator) ( hiftt ) (shift operator) bit, boolean 36/73 sll: shift left logical LEFT srl: shift right logical LEFT LEFT sla: shift left arithmetic sra: shift right arithmetic sra: shift right arithmetic 37/73 . rol: rotate left logical ror: rotate right logical 38/73 operationresultremark 01100011 sll 1"11000110" BIT'LEFT 0 01100011 sll 2 01100011 srl 1 01100011 srl 3"10001100""00110001""00001100" 2 BIT'LEFT 0 3 01100011 srl -2 01100011 sla 1 01100011 sra 2"10001100""11000111""00011000" 01100011 sll 2 1 0 01100011 rol 1 01100011 ror 2 01100011 ror 0"11000110""11011000""01100011" 0 1 39/73 (operator) (operator) ( ddit ) (adding operator) +, - : & : 40/73.

10 (adding operator) (adding operator) tiltoperationresult 0110 & 1001 "01101001"0110 & 1001 0 & 1001 0110 & 1 01101001"01001""01101" 0 & 1 0 & 1001 & 1 "01""010011"41/73 (operator) (operator) (it ) (sign operator) +, - : 42/73. (sign operator) (sign operator) : *, / : ** : absnot not A/+B -- An illegal **-B-- An illegal (+B) -- A legal **(B)A legal expression43/73A ** (-B) --A legal (operator) (operator) (ltilit) (multiplying operator) *, / : mod: , rem: , rem: , 44/73 rem rem A = (A/B)*B + (A remB) (A remB) A (A remB) B mod mod N mod N A = B*N + (A modB) (A modB) B (A modB) B 45/73(Amod).