第4章CMOS論理回路 (1) CMOS ... - dsl.hiroshima-u.ac.jp

1 (1) cmos . 2008/11/18 1.. dd . R: . Out Vout In Vin n-MOS.. 2008/11/18 2.. Id (n-MOS). n-MOS . Id Vg = High Vds Vgs Vgs = Low - . 0 Vds . 2008/11/18 3.. dd .. IR. IR.. Vout . Vout = Vdd- R*i 0 Ri Vdd Vout . 2008/11/18 4.. -MOS R . dd . n-MOS . Id (n-MOS). Vin=. Vgs= High . Vout Vin Vin=. Vgs = Low - 0 Vout=Vds . 2008/11/18 5.. V . OL. -MOS . dd . n-MOS . Id (n-MOS). Vgs= High . Vout .. Vin Vgs = Low - 0 Vds V VOH. OL. Vdd 2008/11/18 6.. Id (n-MOS). 1mA n-MOS . Vgs=3V. dd V . 2V. R=4K . Vds=Vout 1V. 0 1V 2V 3V Vout Vin=Vgs Vin 3V. R= k 2V. 1V. 0 1V 2V 3V Vout 2008/11/18 9.. Id (n-MOS).. 1mA n-MOS . Vgs=3V. dd V . 2V. R=4K . Vds=Vout V. 0 1V 2V 3V Vout Vin Vin=Vgs 3V. 2V. 1V. Vout 2008/11/18 10.

2 cmos . pMOS pMOS . nMOS , MOS . pMOS ,nMOS . dd ( ) dd ( ) dd ( ). p-MOS p-MOS. In Out In Out In Out n-MOS n-MOS. GND GND GND. 2008/11/18 11.. cmos . Out dd ( ). n-MOS In p-MOS. p-MOS GND V dd n+ n+ P+ P+. nWell In Out p .. p GND(0V) Vdd . n-MOS. GND (Vsb) . 2008/11/18 12.. cmos . p Out n Well . GND Vdd .. In .. n-MOS p-MOS. Out GND V dd n+ . nWell P+ . p . 2008/11/18 13.. cmos . dd ( ). p-MOS. In = 0 Out = Vdd Low, "0" High, "1". In Out In = Vdd Out = 0. High, "1" Low, "0". n-MOS. 0 Vdd . GND. 2008/11/18 14.. cmos . dd nMOS. Vgsn=5V. Id Vgsn=4V. Vin Vout . Vgsn=3V. Vds Vgsn=2V. Vgsn GND Vgsn=1V. 0 Vdd Vds 2008/11/18 15.. pMOS. cmos Vgsp= -5V. Vgsn=0V. dd Vgsp= -4V . Id (p-MOS). Vgsp Vgsn=1V.

3 Vds Vgsp= -3V. Vgsn=2V. Vgsp= -2V. Vgsn=3V. Vin Vout Vgsp= -1V. Vgsn=4V -Vdd Vds 0. Vgsn=5V. Id (n-MOS). Vds Vgsn Vgsn=4V.. GND Vgsn=3V. nMOS Vgs Vgsn = Vin Vgsn=2V. nMOS. pMOS Vgs Vgsp = Vin - Vdd Vgsn=1V. 0 Vds Vdd 2008/11/18 16.. cmos . pMOS nMOS . Vgsn . =5V.. Id 4V pMOS nMOS .. 3V.. 2V.. 1V. Vdd 0 Vgsn= 5 4 3 2 1 0.. 2008/11/18 17.. cmos . Vgsn =5V. Id Vdd 0 Vgsn= 5 4 3 2 1 0.. 2008/11/18 18.. cmos . Vgsn =5V. Id 4V. Vdd 0 Vgsn= 5 4 3 2 1 0.. 2008/11/18 19.. cmos . Vgsn Id 3V. Vdd 0 Vgsn= 5 4 3 2 1 0.. 2008/11/18 20.. cmos . Vgsn Id Vdd 0 Vgsn= 5 4 3 2 1 0.. 2008/11/18 21.. cmos . Vgsn Id Vdd 0 Vgsn= 5 4 3 2 1 0.. 2008/11/18 22.. cmos . Vgsn Id Vdd 0 Vgsn= 5 4 3 2 1 0.. 2008/11/18 23.

4 cmos . Vgsn Id 2V. Vdd 0 Vgsn= 5 4 3 2 1 0.. 2008/11/18 24.. cmos . Vgsn Id 1V. Vdd 0 Vgsn= 5 4 3 2 1 0.. 2008/11/18 25.. cmos . Vgsn Id 0V. Vdd 0 Vgsn= 5 4 3 2 1 0.. 2008/11/18 26.. cmos . Vgsn =5V. Id Vdd 0 Vgsn= 5 4 3 2 1 0.. 2008/11/18 27.. cmos . Vgsn Id =4V. Vdd 0 Vgsn= 5 4 3 2 1 0.. 2008/11/18 28.. cmos . Vgsn Id 3V. Vdd 0 Vgsn= 5 4 3 2 1 0.. 2008/11/18 29.. cmos . Vgsn Id Vdd 0 Vgsn= 5 4 3 2 1 0.. 2008/11/18 30.. cmos . Vgsn Id Vdd 0 Vgsn= 5 4 3 2 1 0.. 2008/11/18 31.. cmos . Vgsn Id Vdd 0 Vgsn= 5 4 3 2 1 0.. 2008/11/18 32.. cmos . Vgsn Id 2V. Vdd 0 Vgsn= 5 4 3 2 1 0.. 2008/11/18 33.. cmos . Vgsn Id 1V. Vdd 0 Vgsn= 5 4 3 2 1 0.. 2008/11/18 34.. cmos . Vgsn Id 0V. Vdd 0 Vgsn= 5 4 3 2 1 0.

5 2008/11/18 35.. cmos . Vgsn=5V. Id Vgsn=4V. 0V 5V . Vgsn=3V.. Vgsn=2V. cmos . Vgsn=1V . V . 0. Vgsn nMOS pMOS.. 0 d 2008/11/18 36.. cmos . d . 0.. 2008/11/18 37.. Noise .. dd ( ).. V L p-MOS.. In . V H.. n-MOS.. GND.. 2008/11/18 38.. n-MOS. Vgsn= 5. p-MOS. Vgsp= nMOS pMOS . 4.. Vdd=5V . 3.. 2.. - .5. 0 5. 5 5. 4 4.. 3 3. 2 2. 1 1. 0 0. 0 5 0 . 2008/11/18 39.. Vgsn=. n-MOS. 5 nMOS pMOS . P-MOS. Vgsp=.. 4 Vdd=5V .. 3.. 2. - .5 . 0 5. 5 5. 4 4.. 3 3. 2. 2. 1 1. 0 0. 0 5 0 . 2008/11/18 40.. 4 . (2) . 2008/11/18 44.. NOT . =1 . AND . OR .. NAND(NOT AND) =1.. NOR (NOT OR) .. X X = 0 ( ) . X + X = I ( ) de Morgan's theorem X = X . X + Y = X Y. X + (Y Z) = (X + Y) (X + Z). X (Y + Z) = (X Y) + (X Z) X Y = X + Y.

6 2008/11/18 45.. cmos . dd ( ). A Y Vdd p-MOS.. Y. In Out .. n-MOS 0 Vti Vdd . GND A.. 2008/11/18 46.. 2 NAND . Vdd NAND . Y = A B .. Y.. A Y A.. B.. B.. 2008/11/18 47.. 2 cmos -NAND . Vdd Vdd Vdd pMOS pMOS pMOS. "0" "1" "1". Y Y Y. "1" "1" "0". A A A. nMOS nMOS nMOS. B B B. "1" "0" "0". 2008/11/18 48.. N NAND . Vdd NAND . A B N. Y = A B N. Y. N. A. B Y. N B. A.. 2008/11/18 49.. 2 NOR . Vdd NOR . A.. Y=A+B. B .. Y . A Y.. B.. 2008/11/18 50.. cmos -NOR . Vdd Vdd Vdd "0" "1" "1". A pMOS A pMOS A. pMOS. B B B. "0" 1 "0" "1". Y Y Y. " ". nMOS nMOS nMOS. 2008/11/18 51.. N NOR . Vdd NOR A. B. Y = A+B+ +N. N. A Y. B Y. A B N. N.. 2008/11/18 52.. TG.. B. A B Y. 0 1 0 A Y. ON. 1 1 1. B. 0 0 HiZ. OFF.

7 1 0 Hiz A Y. HiZ: .. 2008/11/18 53.. n-MOS .. B . Ronn ON OFF. A Y 0. Vdd Vdd Vdd-Vtn Vtn . Vgs 0 Vdd 2008/11/18 54.. cmos . Ronp Ronn .. pMOS. B nMOS. nMOS.. cmos . A Y Vdd Vdd pMOS pMOS Vdd -Vtn . cmos . Ron=Ronp//Ronn nMOS. 0 Vdd 2008/11/18 55.. TG .. S A B . Y = A S + B S . S. S Y. A. 1 A Y. 0 B B. 2008/11/18 56.. TG . S S. A. Y. A. B. Y. B. S.. cmos -TG . 2008/11/18 57.. TG ON . A, B 1, 0 Y . AND OR .. 2008/11/18 58.. TG ON . A, B 1, 0 Y . S. VDD S. p Ron "1" TG . Out "0" Vout Vdd/2. Ron Rn .. 2008/11/18 59.. EXOR. Y = A + B = AB+AB. A B Y. 0 0 0 A=1 B=1. 0 1 1 A=0 B=0. 1 0 1. 1 1 0. A=1 B=1. 2008/11/18 60.. EXOR . Y = A B + A B A B + A B = A B A B. 2 4. A 4. Y. B. 4. 2. 16 . 2008/11/18 61.

8 EXOR. Y = A + B = AB+AB. B. TG EXOR. A. Y. A. B. 2008/11/18 62.. TG EXOR . A B Y. - 1 HiZ. B 0 0 0. A 1 0 1. A A Y= A B + A B. A B Y. B 0 1 1. B. 1 1 0. - 0 HiZ.. 2008/11/18 63.. EXOR . B A B Y. 0 1 1. 1 1 0. -- 0 HiZ. A Y. B. B A B Y. -- 1 HiZ. 0 0 0. 1 0 1. 2008/11/18 64.. EXOR . B 1. B=1 . TG OFF. A Y. B. B o 2008/11/18 65.. EXOR . B 0. B=0 . TG . D. 0. 1 S. 0. A Y. S 1. A=0 : . TG D pMOS S,D=0V. nMOS Vgsn=0 . B. B 1 pMOS, nMOS OFF. A=1 : . nMOS S,D=Vdd pMOS Vgsp=0 . pMOS, nMOS OFF. 2008/11/18 66.. EXOR . B. B=0 . TG . A Y. A=0 : . TG. pMOS S,D=0V. nMOS Vgsn=0 . B. B pMOS, nMOS OFF. A=1 : . nMOS S,D=Vdd pMOS Vgsp=0 . pMOS, nMOS OFF. 2008/11/18 67.. cmos (1). Vdd . A B A B C Y. 0 0 0. C 0 0 1.

9 0 1 0. Y. 0 1 1. A C 1 0 0. 1 0 1. 1 1 0. B. 1 1 1. 6 . 2008/11/18 68.. cmos (1). Y = A B + C. A B A B C Y. 0 0 0 1. 0 0 1 0 AND-NOR. C 0 1 0 1. Y 0 1 1 0. Vdd 1 0 0 1. A C 1 0 1 0 A. 1 1 0 0. B. 1 1 1 0 Y. B. 6 . NOR. 2008/11/18 69.. cmos (1). Vdd Vdd A B A. C C. Y Y. A C. B. 6 . AND-NOR NOR. 2008/11/18 70.. AND-NOR. Y = A B + C. A B. NAND,NOR.. C. Y. A. A C B. C Y. B. 6 . 10 . 2008/11/18 71.. AND-NOR . Vdd (A B) (C D) =A B C D =1 . A B. pMOS Y=1 . C D. A B+C D=1 . Y. nMOS Y= . A C. Y = A B+C D = (A B) (C D). B D.. AND-NOR pMOS . GND.. 2008/11/18 72.. OR-NAND . Vdd .. A C.. B D. Y. A B. C D. Gnd 2008/11/18 73.. OR-NAND . Vdd 0000 . 0001 . A C 0010 . 0011 . 0100 . B D 0101 . 0110 .. Y 0111.

10 1000 . A B C D . 1001 . A B 1010. 1011.. OR-NAND. 1100 . C D 1101 . 1110 . 1111 . GND. 2008/11/18 74.. AND-NOR OR-NAND . Vdd Vdd ABC A D G. B E H. DEF C F I. GHI Y. Y GHI. A D G DEF. B E H. C F I ABC. GND GND. 2008/11/18 75.. cmos .. MOS .. 2008/11/18 76.. cmos .. CLK A. CLK. A Y Y. CLK. CLK. 2008/11/18 77.. cmos .. CLK. CLK A. CLK. A Y Y A Y. CLK. CLK. CLK.. 2008/11/18 78.. cmos .. CLK. CLK. A Y. A Y. CLK CLK. P-MOS, n-MOS , , . 2008/11/18 79.. cmos . 2 NAND . CLK CLK. A. Y. Y. B. A. CLK B. CLK. 2008/11/18 81.. EXOR EXNOR .. EXOR EXNOR . 2008/11/18 82.. AND-NOR EXNOR . Vdd AB + AB. A B. A B. Y. A A. B B. GND. 2008/11/18 83.. AND-NOR EXOR . Vdd Y=AB + AB. A B. AB + AB. A B. AB AB. Y. A A.