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APPLICATION NOTE UC3842/3/4/5 PROVIDES LOW-COST …

Clock verror vsense latch outputU-100 AAPPLICATION NOTEUC3842/3/4/5 PROVIDES LOW-COSTCURRENT-MODE CONTROLINTRODUCTIONCURRENT-MODE CONTROLThe fundamental challenge of power supply design is tosimultaneously realize two conflicting objectives: goodelectrical performance and low cost . The uc3842 /3/4/5is an integrated pulse width modulator (PWM) designedwith both these objectives in mind. This IC PROVIDES de-signers an inexpensive controller with which they can ob-tain all the performance advantages of current mode op-eration. In addition, the uc3842 series is optimized for ef-ficient power sequencing of off-line converters, DC to DCregulators and for driving power MOSFETs or APPLICATION note PROVIDES a functional description ofthe uc3842 family and highlights the features of each in-dividual member, the uc3842 , UC3843, UC3844 andUC3845 Throughout the text, the uc3842 part numberwill be referenced, however the generalized circuits andperformance characteristics apply to each member of theUC3842 series unless otherwise noted.

clock verror vsense latch output U-100A APPLICATION NOTE UC3842/3/4/5 PROVIDES LOW-COST CURRENT-MODE CONTROL INTRODUCTION CURRENT-MODE CONTROL The fundamental ...

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Transcription of APPLICATION NOTE UC3842/3/4/5 PROVIDES LOW-COST …

1 Clock verror vsense latch outputU-100 AAPPLICATION NOTEUC3842/3/4/5 PROVIDES LOW-COSTCURRENT-MODE CONTROLINTRODUCTIONCURRENT-MODE CONTROLThe fundamental challenge of power supply design is tosimultaneously realize two conflicting objectives: goodelectrical performance and low cost . The uc3842 /3/4/5is an integrated pulse width modulator (PWM) designedwith both these objectives in mind. This IC PROVIDES de-signers an inexpensive controller with which they can ob-tain all the performance advantages of current mode op-eration. In addition, the uc3842 series is optimized for ef-ficient power sequencing of off-line converters, DC to DCregulators and for driving power MOSFETs or APPLICATION note PROVIDES a functional description ofthe uc3842 family and highlights the features of each in-dividual member, the uc3842 , UC3843, UC3844 andUC3845 Throughout the text, the uc3842 part numberwill be referenced, however the generalized circuits andperformance characteristics apply to each member of theUC3842 series unless otherwise noted.

2 A review of cur-rent mode control and its benefits is included and meth-ods of avoiding common pitfalls are mentioned. The finalsection presents designs of power supplies utilizingUC3842 1 shows the two-loop current -mode control systemin a typical buck regulator APPLICATION . A clock signal initi-ates power pulses at a fixed frequency. The termination ofeach pulse occurs when an analog of the inductor currentreaches a threshold established by the error signal. In thisway the error signal actually controls peak inductor cur-rent. This contrasts with conventional schemes in whichthe error signal directly controls pulse width without regardto inductor performance advantages result from the use ofcurrent-mode control.

3 First, an input voltage feed-forwardcharacteristic is achieved; , the control circuit instanta-neously corrects for input voltage variations without usingup any of the error amplifier s dynamic range. Therefore,line regulation is excellent and the error amplifier can bededicated to correcting for load variations converters in which inductor current is continuous,controlling peak current is nearly equivalent to controllingaverage current . Therefore, when such converters employcurrent-mode control, the inductor can be treated as anFigure 1. Two-Loop current -Mode Control System3-53 APPLICATION NOTEU-100 Aerror-voltage-controlled- current -source for the purposes ofsmall-signal analysis. This is illustrated by Figure 2.

4 Thetwo-pole control-to-output frequency response of theseconverters is reduced to a single-pole (filter capacitor inparallel with load) response. One result is that the erroramplifier compensation can be designed to yield a stableclosed-loop converter response with greater gainband-width than would be possible with pulse-width control, giv-ing the supply improved small-signal dynamic response tochanging loads. A second result is that the error amplifiercompensation circuit becomes simpler, as illustrated in Fig-ure 3. Capacitor Ci and resistor Ri, in Figure 3a add a lowfrequency zero which cancels one of the two poles of non- current -mode converters. For large-signal load changes, in which converter response is limit-ed by inductor slew rate, the error amplifier will saturatewhile the inductor is catching up with the load.

5 During thistime, Ci will charge to an abnormal level. When the induc-tor current reaches its required level, the voltage on Cicauses a corresponding error in supply output recovery time is R&i, which may be quite long. How-ever, the compensation network of Figure 3b can be usedwhere current -mode control has eliminated the inductorpole. Large-signal dynamic response is then greatly im-proved due to the absence of limiting is greatly simplified with current -mode con-trol. Pulse-by-pulse limiting is, of course, inherent in thecontrol scheme. Furthermore, an upper limit on the peakcurrent can be established by simply clamping the errorvoltage. Accurate current limiting allows optimization ofmagnetic and power semiconductor elements while ensur-ing reliable supply , current -mode controlled power stages can be op-erated in parallel with equal current sharing.

6 This opensthe possibility of a modular approach to power supply 2. Inductor Looks Like a current Source to Small SignalsVrefA) Direct Duty Cycle ControlB) current Mode ControlFigure 3. Required Error Amplifier Compensation for Continuous Inductor current Designs3-54 APPLICATION NOTEU-100 ATHE UC3842/3/4/5 SERIES OF current -MODE PWM IC SDESCRIPTIONFEATURESThe UC1842/3/4/5 family of control ICs PROVIDES the nec-essary features to implement off-line or DC to DC fixedfrequency current mode control schemes with a minimalexternal parts count. Internally implemented circuits in-clude under-voltage lockout featuring start up current lessthan 1 mA, a precision reference trimmed for accuracy atthe error amp input, logic to insure latched operation, aPWM comparator which also PROVIDES current limit control,and a totem pole output stage designed to source or sinkhigh peak current .

7 The output stage, suitable for driving ei-ther N Channel MOSFETs or bipolar transistor switches, islow in the off between members of this family are the un-der-voltage lockout thresholds and maximum duty cycleranges. The UC1842 and UC1844 have UVLO thresholdsof 16V (on) and 10V (off), ideally suited to off-line applica-tions. The corresponding thresholds for the UC1843 andUC1845 are and The UC1842 and UC1843 canoperate to duty cycles approaching 100%. A range ofzero to <50% is obtained by the UC1844 and UC1845 bythe addition of an internal toggle flip flip which blanks theoutput off every other clock SELECTION GUIDEl Optimized for Off-Line and DC to DC Convertersl Low Start Up current (< 1 mA)@ Automatic Feed Forward Compensationl Pulse-By-Pulse current Limitingl Enhanced Load Response Characteristicsl Under-Voltage Lockout with Hysteresisl Double Pulse Suppressionl High current Totem Pole Outputl Internally Trimmed Bandgap Referencel 500 kHz Operationl Low Ro Error AmpRECOMMENDED USAGENote: 1.

8 (A/B/ A= DIL-8 Pin Number. B = SO-16 Pin Toggle flip flop used only in 1844A and 43-55 Figure 5 APPLICATION NOTEUNDER-VOLTAGE LOCKOUTU-100 AThe UVLO circuit insures that VCC is adequate to makethe UC3842/3/4/5 fully operational before enabling theoutput stage. Figure 5 shows that the UVLO turn-on andturn-off thresholds are fixed internally at 16V and 10V re-spectively. The 6V hysteresis prevents Vcc oscillationsduring power sequencing. Figure 6 shows supply currentrequirements. Start-up current is less than 1 mA for effi-cient bootstrapping from the rectified input of an off-lineconverter, as illustrated by Figure 6. During normal circuitoperation, VCC is developed from auxiliary winding WAuxwith D1 and GIN.)

9 At start-up, however, GIN must becharged to 16V through RtN. With a start-up current of 1mA, RtN can be as large as 100 kR and still charge GINwhen VAc =90V RMS (low line). Power dissipation inRIN would then be less than 350 mW even under high line(VAc = 130V RMS) UVLO; the output driver is in a low state. While itdoesn t exhibit the same saturation characteristics as nor-mal operation, it can easily sink 1 milliamp, enough to in-sure the MOSFET is held 6. During Under-Voltage Lockout, the outputdriver is biased to sink minor amounts uc3842 oscillator is programmed as shown in Figure8. Timing capacitor CT is charged from VREF (5V) throughthe timing resistor RT, and discharged by an internal cur-rent first step in selecting the oscillator components is todetermine the required circuit deadtime.

10 Once obtained,Figure 9 is used to pinpoint the nearest standard value ofCT for a given deadtime. Next, the appropriate RT value isinterpolated using the parameters for CT and oscillatorfrequency. Figure 10 illustrates the RT/CT combinationsversus oscillator frequency. The timing resistor can be cal-culated from the following (kHz) = / (RT (k) CT (pf))The UC3844 and UC3845 have an internal divide-by-twoflip-flop driven by the oscillator for a 50% maximum dutycycle. Therefore, their oscillators must be set to run attwice the desired power supply switching frequency. TheUC3842 and UC3843 oscillator runs AT the switching fre-quency. Each oscillator of the UC3842/3/4/5 family canbe used to a maximum of 500 7.


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