Catalog Number 276-1784 - FutureBots

1 Catalog Number 276-1784AN EXCLUSIVE RADIO SHACK SERVICE TO THE EXPERIMENTERSPO256 NARRATORTM SPEECHF eaturesNatural SpeechStand Alone Operation with Inexpen-sive Support ComponentsWide Operating VoltageWord, Phrase, or Sentence Library,ROM ExpandableExpandable to 491 K of ROM DirectlySimple Interface to Most Microcom-puters or MicroprocessorsSupports Synthesis: FormantSynthesis: Allophone SynthesisGenerel DescriptionThe SPO256 (Speech Processor) is a singlechip N-Channel MOS LSI device that isable, using its stored program, to synthe-size speech or complex achievable output is equivalent to aflat frequency response ranging from 0to 5 kHz, a dynamic range of 42dB, anda signal to noise ratio of SP0256 incorporates four basicfunctions:RADIO SHACK, A DIVISION OF TANDY : FORT WORTH, TEXAS 76102 CANADA.

2 BARRIE, ONTARIO L4M 4W5 TANDY CORPORATIONAUSTRALIA BELGIUM UK91 KURRAJONG ROAD PARC INDUSTRIEL DE NANINNE BILSTON ROAD WEDNESBURYMOUNT DRUITT, N S W 2770 5140 NANINNE WEST MIDLANDS WS10 7JN464 Printed in USAA software programable digital filterthat can be made to model a 16K ROM which stores both dataand Instructions (THE PROGRAM).A MICROCONTROLLER which con-trols the data flow from the ROM tothe digital filter, the assembly of the word strings necessary for linkingspeech elements together, and theamplitude and pitch information toexcite the digital PULSE WIDTH MODULATOR thatcreates A digital output which i s con-PROCESSORPIN CONFIGURATION verted to an analog signal when fil-tered by an external low pass Based Speech Processor- SPO256-AL2 One example of a preprogramed SPO256is the AL2 Usage with aMicroprocessorThe SPO256-AL2 requires the use of aprocessor to concatenate the speechsounds to form SPO256 is controlled using the ad-dress pins (A1-A8), ALD (Address Load),and SE (Strobe Enable).

3 The object forcontrolling the chip is to load an addressinto It which contains the desired allo-phone. The speech data for the allophoneset is contained within the internal 16 KROM of the PACKAGED IN BY RADIO SHACK A DIVISION OF TANDY CORPORATION This particular application (Allophone Set)requires only six address Pins (A1-A6) toaddress all the 69 allophones plus fivepauses, a total of 64 locations. Forsimplicity, since only six address pins areneeded to address the 64 locations, pins A7and A8 can be tied low (to ground) and nowany further references to the address buswill Include A1-A6 end A7=A8=0 There are two modes available for loading anaddress into the chip.

4 SE (Strobe Enable)controls the mode that will be 0 (SE=0) will latch is an address whenany one or more of the address pins makesa low to high transition. For example, to loadthe address one (1), A2 to A6=0 and A1 ispulsed high. To load the address twelve (12octal), A1=A3=A5=A6=0, A2 and A4 arepulsed high simultaneously. (Note that anaddress of zero cannot be loaded using thismode).Mode 1 (SE=1) will latch in an address usingthe ALD pln. First, setup the desiredaddress on the address bus (A1-A6) andthenSPO256 BLOCK DIAGRAMC1C2C3 EXTERNAL ROMCONTROLALUDATA2K x 8 BITROMSTART ADDRESSLATCHADDRESSREGISTERHANDSHAKECONT ROLPULSE WIDTHMODULATORSOURCE ANDINTERPOLATION(5 REGISTERS)12 HOLDINGREGISTERS(COEFFICIENTS)VOCAL TRACT MODEL(12 POLE DIGITALFILTER)OSCROM DISABLEROM CLOCKSERIAL COEFFICIENT TRANSFERSERINVD1 SEROUTOSC 2 OSC 1 DIGITALOUT8 BITSA8A18 BITADDRESSSBY RESETALD SE LRQ SBY8 BITS7 BITS2low.

5 Any address can be loaded using thismode, but certain setup and hold times arethen pulse ALD required (refer to theattached timing diagram for the specifictimes).Two microprocessor interface pins areavailable for quick loading of are LRQ and SBY. LRQ (LoadRequest) tells the processor when the inputbuffer is full. SBY (Stand By) tells theprocessor that the chip has stopped talkingand no new address has been loaded. Eitherinterface pin can be used whenconcatenating allophones. LRQ is an activelow signal, when LRQ goes low it is time toload a new address to the chip. If LRQ ishigh, then simply wait for It to go low beforeloading the address. SBY will stay high untilan address is loaded, then it will go low andstay low until all the internal instructions(Speech Code) from that one address arecompleted.

6 Once this signal goes high, It istime to load a new address. Since speechdoes not require very fast address loading, itwould be acceptable to use SBY to interfaceto the end a word using allophones it isnecessary to load a pause to complete theword. For example, the word TW O thenistosimoELECTRICAL CHARACTERISTICSM aximum Ratings*All pins with respect to to C to 125 CStandard ConditionsClock - Crystal Frequency .. MHzOperating Temperature (Ta) ..0 C to 70 CDC CHARACTERlSTlCS/SPO 256 Supply VoltageSupply CurrentCharacteristicSymMinTypMaxUnitsCo nditionsINPUTSA1-A8, ALD, SERIN, TEST, SELOGIC 0 LOGIC 1 CAPACITANCELEAKAGERESET, SBY RESETLOGIC 0 LOGIC 1 OUTPUTSSBY, Digital Out, C1, C2, C3,LRQ, ROM DIS, ROM CLK,SEROUTLOGIC 0 LOGIC 1 OSCILLATOROSC 2 (Output)LOGIC 0 LOGIC = 25 C, V , V = & SBY Reset outputs as Volts bias, f = MHzIL+10 aVPIN= Other Pins = (2LS TTL Loads)= -50 a (2LS TTL Loads)When driven from external 1 (Input) = V MINOSC 1 (Input) = V MAXcan be implemented using the followingallophones, TT2-VW 2-PA1.

7 PA1 is actuallynot an allophone but a pause which isneeded to end the word.*Exceeding these ratings could cause permanentdamage to the device. This is a stress rating only andfunctional operation of this device at these conditionsis not im-plied. Operating ranges are specified inStandard Condi-tions. Exposure to absolutemaximum rating conditions for extended periods mayaffect device labeled "typical" is presented for designguidance only and is not guaranteed3 PIN FUNCTIONSPIN NUMBER1 NAMEFUNCTION 1 ssGround2 RESETA logic 0 resets that portion of the SPpowered by VDD. Must be returned to alogic 1 for normal DISABLEFor use with an external serial speechROM, a logic 1 disables the , 5,6Cl, C2, C3 Output control lines for use with an ex-ternal serial speech ROM.

8 Refer to theSPR016 Data Sheet for supply for all portions of the SPexcept the microprocessor interface SBY STANDBY. A logic 1 output Indicatesthat the SP is inactive and VDD can bepowered down externally to conservepower. When the SP is reactivated by anaddress being loaded, SBY will go to alogic LRQLOAD REQUEST. LRQ is a logic 1output whenever the input buffer isfull. When LRQ goes to a logic 0, the in-put port may be loaded by placing the 8address bits on A1-A8 and pulsing theALD ,11,13,14 A8, A7, A6, A5, 8 bit address which defines any one of15,16,17,18 A4. A3. A2. A 1 256 speech entry SER OUT SERIAL ADDRESS OUT.

9 This outputtransfers a 16-bit address serially to anexternal speech SE STROBE ENABLE. Normally held in alogic 1 state. When tied to ground, ALDIs disabled and the SP will automatic-ally latch in the address on the input busapproximately lus after detecting a logic1 on any address ALD ADDRESS LOAD. A negative pulse onthis input loads the 8 address bits intothe input port. The negative edge of thispulse causes LRQ to go SER IN SERIAL IN. This is an E-bit serial datainput from an external speech Functions ContinuedIPIN NUMBERI22I2324I25426I27I28 NAMETESTFUNCTIONThis pin should be grounded for Power supply for the microprocessor in-terface logic and OUT Pulse width modulated digital speechoutput which, when filtered by a 5 KHzlow pass filter and amplified, will drive RESET STANDBY RESET.

10 A logic 0 resets themicroprocessor interface logic and theaddress latches. Must be returned to alogic 1 for normal CLOCK This is a clock output usedto drive an external serial speech XTAL IN. Input connection for XTAL OUT. Output connection for SPEECHSYNTHESISI ntroductionThe allophone speech,synthesis technique provides the userwith the ability to synthesize an un-limited vocabulary at a very low bitrate. Fifty-nine discrete speech sounds(called allophones) are five pauses arelstored at different addresses in theSPO256 internal ROM. Each speechsound was excised from a word and an-alyzed using linear predictive coding(LPC). Any English word or phrase canbe created by addressing the appropri-ate combination of allophones andpauses.