Circuit Design and Simulation with VHDL second edition

1 Circuit Design and Simulation with VHDL second editionCircuit Design and Simulation with VHDL second editionVolnei A. PedroniThe MIT PressCambridge, MassachusettsLondon, England62010 Massachusetts Institute of TechnologyAll rights reserved. No part of this book may be reproduced in any form by any electronic or mechanical means(including photocopying, recording, or information storage and retrieval) without permission in writing from information about special quantity discounts, please email book was set in Times New Roman on 3B2 by Asco Typesetters, Hong and bound in the United States of of Congress Cataloging-in-Publication DataPedroni, Volnei Design and Simulation with VHDL / Volnei A. Pedroni. 2nd ed. of: Circuit Design with VHDL / Volnei A. Pedroni. bibliographical references and 978-0-262-01433-5 (hardcover : alk.)

2 Paper) 1. VHDL (Computer hardware description language).2. Electronic Circuit Design . 3. System Design . I. Pedroni, Volnei A. II. dc22200904590910987654321 This second edition is dedicated to the many people, in so many countries, who made thefirst edition of the book so VHDL11 About VHDL Design EDA Translation of VHDL Code into a Circuit VHDL Number and Character Representations in VHDL82 Code Fundamental VHDL VHDL Libraries and Library/Package Introductory VHDL Coding VHDL Exercises283 Data VHDL Data-Type Libraries and Type Standard Data Standard-Logic Data Unsigned and Signed Data Fixed- and Floating-Point Predefined Data Types User-Defined Scalar User-Defined array Integer versus Enumerated array Specifying PORT Qualified Types and Type Legal versus Illegal ACCESS FILE VHDL Exercises814 Operators and Predefined Overloaded and User-Defined Predefined User-Defined Synthesis

3 VHDL Exercises1155 Concurrent Using The WHEN The SELECT The GENERATE Implementing Sequential Circuits with Concurrent Implementing Arithmetic Circuits with Preventing Combinational-Logic Allowing Multiple Signal VHDL Exercises1446 Sequential Latches and The IF The WAIT The LOOP The CASE CASE versus Implementing Combinational Circuits with Sequential VHDL Exercises1727 SIGNAL and SIGNAL versus The Inference of Dual-Edge Making Multiple Signal Exercises193II SYSTEM-LEVEL VHDL1998 PACKAGE and GENERIC COMPONENT Instantiation with VHDL Exercises219 Contentsix9 FUNCTION and The ASSERT FUNCTION versus PROCEDURE VHDL Exercises23810 Simulation with VHDL Simulation Writing Data to Reading Data from Graphical Simulation (Preparing the Design ) Stimulus General VHDL Template for Type I Testbench (Manual Functional Simulation ) Type II Testbench (Manual Timing Simulation ) Type III Testbench (Automated Functional Simulation ) Type IV Testbench (Automated Timing Simulation ) Testbenches with Record Testbenches with Data Exercises271 III EXTENDED AND ADVANCED DESIGNS27511 VHDL Design of State VHDL Template for Poor FSM FSM Encoding The State-Bypass Problem in Systematic Design Technique for Timed FSMs with Repetitive Other FSM Exercises31312 VHDL Design with Basic Basic LED/SSD/LCD Playing with a Seven-Segment Frequency Meter (with LCD) Digital Clock (with SSDs) Quick-Finger Game (with LEDs and SSDs)

4 Other Designs with Basic Exercises34613 VHDL Design of Memory Implementing Bidirectional Memory Initialization ROM RAM External Memory Exercises37114 VHDL Design of Serial Communications Data PS2 I2C SPI TMDS Video Interfaces: VGA, DVI, and Exercises41915 VHDL Design of VGA Video VGA DDC and Circuit Control Pixel Setup for the Comments on VHDL Code for VGA Hardware-Generated Image Generation with a File and On-Chip Arbitrary Image Generation with a File and O -Chip Image Equalization with Gamma Exercises441 Contentsxi16 VHDL Design of DVI Video Circuit Display DVI Types and DVI DVI versus Setup for the Hardware-Generated Other DVI Exercises46417 VHDL Design of FPD-Link Video FPD-Link Setup for the Hardware-Generated Hardware-Generated Image with Other Exercises491 APPENDICES493A programmable Logic Devices495B Altera Quartus II Tutorial503C Xilinx ISE Tutorial515D ModelSim Tutorial525E Altera DE2 Board Tutorial537F BMP-to-RAW File Converter

5 Tutorial545G Using Macrofunctions547H Packagestandard(2002 and 2008)551 IPackagestd_logic_1164(1993 and 2008)555J Packagenumeric_std(1997 and 2008)563K Packagestd_logic_arith577L Packagestd_logic_signed583M Packagetextio(2002 and 2008)585xiiContentsN Packagenumeric_std_unsigned(2008)589O Reserved Words in VHDL 2008593 Bibliography595 Index597 ContentsxiiiPrefaceThe book presents one of the most comprehensive coverages so far of VHDL and its appli-cations to the Design and Simulation of real, industry-standard circuits. It does not focusonly on the VHDL language, but also on its use in building and testing digital circuits. Inother words, besides explaining VHDL in detail, it also shows why, how, and which typesof circuits are inferred from the language constructs, and how any of the four simulationcategories can be implemented, all demonstrated by means of numerous examples.

6 A rig-orous distinction is made between VHDL for synthesis and VHDL for Simulation . In bothcases, the VHDL codes are always complete, not just partial sketches, and are accompa-nied by Circuit theory, code comments, and Simulation results whenever applicable. Thebook also reviews fundamental concepts of digital electronics and digital Design , resultingin a very practical, self-contained approach. A series of modern extended and advanceddesigns are also presented, covering state machines, memory implementations, serial datacommunications circuits, video interfaces, and Features1 The book focuses on theuseof VHDL rather than solely on the language itself. In otherwords, besides explaining VHDL in detail, it also shows why, how, and which types of cir-cuits are inferred from the language book makes a clear distinction between the parts of VHDL that are forsynthesisversus those that are forsimulation(contrary to other books, which usually mix up allVHDL constructs).

7 1 The VHDL codes in all Design examples are complete, not just partial sketches. Circuitdiagrams, physical synthesis in Field programmable gate Arrays (FPGAs), simulationresults, and explanatory comments are also included in the teaches all indispensable features of VHDL in a very concise is the first text to also include a detailed analysis of Circuit Simulation with VHDL test-benches in all four categories (nonautomated and fully automated, functional and timingsimulations), accompanied also by related tutorials (like ModelSim), which allow completeend-to-end practical examples to be book also reviews fundamental concepts of digital electronics and digital Design ,resulting in a very practical, self-contained ease the understanding of the language and its applications, the review and the exam-ples are separated intocombinationalandsequentialcircuits.

8 Further distinction is madebetweenlogicalversusarithmeticcombin ational circuits, as well as betweenregularversusstate-machine-baseds equential book is divided into three parts, with Circuit -level VHDL in part 1 (chapters 1 8),system-level VHDL and Simulation in part 2 (chapters 8 10), and finally extended andadvanced designs in part 3 (chapters 11 17). In summary, chapters 1 10 teach VHDL,while chapters 11 17 show a series of extended and advanced designs using of new, modern digital circuits, like advanced state machines, serial data com-munications circuits, and video interfaces, all with theory, complete VHDL codes, simula-tion, and explanatory comments, makes the lab sections much more examples and exercises are named to ease the identification of the Circuit /designunder , a series of 15 appendices show tutorials on very important Design tools, such asISE, Quartus II, and ModelSim, plus descriptions of programmable logic devices (CPLDs/FPGAs, in which the designs are implemented), of the DE2 development board, of stan-dard VHDL packages, and Di erences Relative to the First EditionThe book was updated, extended, and immensely improved.

9 The VHDL language is nowcovered in chapters 1 10 (including fundamental designs and Simulation ), while chapters11 17 present extended and advanced designs. Below is a summary of the main improve-ments with respect to the first edition , preceded by the total number of examples, exercises,and figures in both Design examples: 79 (first edition ); 94 ( second edition )Exercises: 96 (first edition ); 231 ( second edition )Figures: 145 (first edition ); 278 ( second edition )With Respect to the LanguageThe study of VHDL (chapters 1 10) was updated, extended, and deepened. The syntaxwas improved, with better coverage and a simplified representation adapted from theBackus-Naur Form. Features of VHDL 2008 were also included. New theoretical detailsxviPrefacewere included in the descriptions of basically all circuits. Additionally, the number ofexamples and of exercises grew chapters 2 4, the study of VHDL libraries/packages was extended.

10 Numerous newdetails, particularly for synthesis, were described and included in the examples and exer-cises. The description of the code structure, in chapter 2, was modernized, including addi-tional details about the syntax and synthesis packages as well as new introductory chapter 3, the description of data types was updated and immensely expanded. A morerigorous distinction between the several data type families was provided, including severaltype classifications. A successful technique introduced in the first version, which bases anydata type on its number of bits, was again employed and extensively used in the conversion and the analysis of unsigned versus signed types were also chapter 4, the description of operators and attributes was updated and expanded. Allpredefined options are now present in the text. A series of synthesis attributes, to preventlogic or register simplifications or for automated pin assignments, were also study of concurrent code, in chapter 5, received new examples and new topics,including recommendations for the implementation of signed systems, followed by respec-tive examples.