Current-mode PWM controller UC3842 - cvut.cz

1 Philips Semiconductors Linear ProductsProduct specificationUC3842 Current-mode PWM controller1100 August 31, 1994853-0614 13721 DESCRIPTIONThe UC3842 is available in an 8-Pin mini-DIP the necessaryfeatures to implement off-line, fixed-frequency Current-mode controlschemes with a minimal external parts count. This technique resultsin improved line regulation, enhanced load response characteristics,and a simpler, easier to design control loop. Topological advantagesinclude inherent pulse-by-pulse current circuitry includes built-in undervoltage lock-out andcurrent limiting. Other features include fully-latched operation, a 1%trimmed bandgap reference, and start-up current less than devices feature a totem-pole output designed to source andsink high peak current from a capacitive load, such as the gate of apower MOSFET.

2 Consistent with N-channel power devices, theoutput is low in the Low start-up current ( 1mA) Automatic feed-forward compensation Pulse-by-pulse current limiting Enhanced load response characteristics Undervoltage lock-out with hysteresis Double pulse suppression High current totem-pole output Internally-trimmed bandgap reference 400kHz operation, guaranteed minPIN CONFIGURATIONSN PackageD Package123456781234567814131211109 COMPNCCOMPVFBISENSERT/CTVFBISENSERT/CTNC NCVREFVCCOUTPUTGROUNDNCVREFVCCOUTPUTGROU NDVCPOWER GROUNDTOP VIEWTOP VIEWAPPLICATIONS Off-line switched mode power supplies DC-to-DC converters UC3842 BLOCK DIAGRAMNOTE.

3 Pin numbers in parentheses refer to the D package.(12)7(9)5(7)4(3)2(1)1(5)37(11)8( 14)6(10)5(8)GNDCOMPCURRENTSENSECURRENTSE NSECOMPARATORPWMLATCHINTERNALBIAS5 VREFUVLO34V16 VOSCERRORAMP+ Semiconductors Linear ProductsProduct specificationUC3842 Current-mode PWM controllerAugust 31, 19941101 ORDERING INFORMATIONDESCRIPTIONTEMPERATURE RANGEORDER CODEDWG #8-Pin Plastic Dual In-Line Package (DIP)0 to +70 CUC3842N0404B14-Pin Plastic Small Outline (SO) Package0 to +70 CUC3842D0405 BABSOLUTE MAXIMUM RATINGS1 SYMBOLPARAMETERRATINGUNITVCCS upply voltage (ICC<30mA)Self-LimitingVCCS upply voltage(low impedance source)

4 30 VIOUTO utput current2, 3 1 AOutput energy (capacitive load)5 JAnalog inputs (Pin 2, Pin 3) to amp output sink current10mAPDP ower dissipation at TA 70 C1W(derate C for TA>70 C)2 TSTGS torage temperature range-65 to +150 CTSOLDLead temperature(soldering, 10sec max)300 voltages are with respect to Pin 5; all currents are positive into the specified section in application note on Power Dissipation Calculation . parameter is guaranteed, but not 100% tested in Semiconductors Linear ProductsProduct specificationUC3842 Current-mode PWM controllerAugust 31, 19941102DC AND AC ELECTRICAL CHARACTERISTICS0 TJ 70 C for UC3842 ; VCC=15V; RT=10kW; CT= , unless otherwise CONDITIONSUC3842 UNITSYMBOLPARAMETERTEST CONDITIONSMinTypMaxUNITR eference sectionVOUTO utput voltageTJ=25 C, IO= regulation12 VIN 25V620mVLoad regulation1 IO 20mA625mVTemp.

5 CTotal output variation1 Line, load, noise voltage110Hz f 10kHz, TJ=25 C50 VLong-term stability1TJ=125 C, 1000 short-circuitTJ=25-30-100-130mAOutput short-circuit-55<TJ 0 C-30-100-180mAOscillator sectionInitial accuracyTJ=25 C475257kHzVoltage stability12 VCC stability1 TMIN TJ TMAX5%AmplitudeVPIN 4 amp sectionInput voltageV Pin 1= bias AAVOL2 VO 4V6590dBUnity gain bandwidth1TJ=25 gain bandwidthTMIN<TJ< supply rejection ratio12 VCC 25V6070dBISINKO utput sink currentVPIN 2= , VPIN 1= source currentVPIN 2= , VPIN 1= HighVPIN 2= , RL=15k to ground56 VVOUT LowVPIN 2= , RL=15k to Pin sense sectionGain2, input signal2 VPIN 1= supply rejection ratio212 VCC 25V70dBIBIASI nput bias current -2-10 ADelay to output1150300nsPhilips Semiconductors Linear ProductsProduct specificationUC3842 Current-mode PWM controllerAugust 31, 19941103DC AND AC ELECTRICAL CHARACTERISTICS0 TJ 70 C for UC3842 ; VCC=154; RT=10k.

6 CT= , unless otherwise specifiedSYMBOLPARAMETERTEST CONDITIONSUC3842 UNITSYMBOLPARAMETERTEST CONDITIONSMinTypMaxUNITO utput sectionVOLO utput Low-LevelISINK= Low-LevelISINK= High-LevelISOURCE= High-LevelISOURCE= timeCL=1nF50150nstFFall timeCL=1nF50150nsUndervoltage lockout sectionStart operating voltage after turn sectionMaximum duty cycle9397100%Minimum duty cycle0%Total standby currentStart-up supply currentVPIN 2=VPIN 3=0V1117mAVCC zener voltageICC=25mA34 VMaximum operating frequency sectionMaximum operating frequency for allfunctions operating cycle-by-cycle400 parameters.

7 Although guaranteed, are not 100% tested in measured at trip point of latch with VPIN 2= Gain defined as:A VPIN1 VPIN3; 0 VPIN3 LOCKOUTUC3842 VON16 VVOFF10 VNOTE:During Undervoltage Lock-Out, the output driver is biased to a highimpedance state. Pin 6 should be shunted to ground with a bleederresistor to prevent activating the power switch with output leakage COMMANDTO REST OF ICVCCVOFFVONICC<15mA<1mAERROR AMP CONFIGURATIONNOTE:Error AMP can source or sink up to + Philips Semiconductors Linear ProductsProduct specificationUC3842 Current-mode PWM controllerAugust 31, 19941104 current SENSE CIRCUITNOTE:Peak current (IS) is determined by the formula.

8 A small RC filter may be required to suppress switch PERFORMANCE CHARACTERISTICSO utput Saturation CharacteristicsError Amplifier Open-LoopFrequency ResponseVOLTAGE GAIN (dB)FREQUENCY (Hz)PHASE (DEG)100806040200 20101001k10k100k 1M10M450 45 90 135 180 225 SATURATION VOLTAGE (V) current , SOURCE OR SINK (A)0 AvPhilips Semiconductors Linear ProductsProduct specificationUC3842 Current-mode PWM controllerAugust 31, 19941105 OPEN-LOOP LABORATORY TEST FIXTURENOTE:High peak currents associated with capacitive loads necessitate careful grounding techniques. Timing and bypass capacitors should be connected close to Pin 5 in a single pointground.

9 The transistor and 5k potentiometer are used to sample the oscillator waveform and apply an adjustable ramp to Pin FSHUTDOWN TECHNIQUESNOTE:Shutdown of the UC3842 can be accomplished by two methods; either raise Pin 3 above 1V or pull Pin 1 below a voltage two diode drops above ground. Either method causes theoutput of the PWM comparator to be high (refer to Block Diagram). The PWM latch is reset dominant so that the output will remain low until the next clock cycle after the shutdowncondition at Pins 1 and/or 3 is removed. In the examples shown, an externally-latched shutdown may be accomplished by adding an SCR which will be reset by cyclingVCC below the lower UVLO threshold (10V).

10 At this point all internal bias is removed, allowing the SCR to CURRENTSHUTDOWNSENSE Semiconductors Linear ProductsProduct specificationUC3842 Current-mode PWM controllerAugust 31, 19941106 OFF-LINE FLYBACK (5V 2 5A)+ 220 F10 F4700 F470pFVFBVREFRT/CTVCCNOTES:T1: Coilcraft E-4140-BPrimary 97 turnssingle AWG24 Secondary 4 turns4 parallelAWG22control 9 turns 3 parallel AWG28 SPECIFICATIONSI nput line voltage:90 VAC to 130 VACI nput frequency:50 or 60 HzSwitching frequency:40kHz 10%Output power:25W maximumOutput voltage:5V 5%Output current :2 to 5 ALine regulation:8%/A*Efficiency @ 25 W,VIN=90 VAC:70%VIN=130 VAC:65%Output short-circuit averageNOTE:This circuit uses a low-cost feedback scheme in which the DCvoltage developed from the primary-side control winding is sensedby the UC3842 error amplifier.