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each temperature range. speed grade (that is, the D …

SummaryThe Xilinx Zynq UltraScale+ RFSoCs are available in -2 and -1 speed grades, with -2E devices having thehighest performance. The -2LE and -1LI devices can operate at a VCCINT voltage at or and arescreened for lower maximum static power. When operated at VCCINT = , using -2LE and -1LI devices, thespeed specification for the L devices is the same as the -2I or -1I speed grades. When operated atVCCINT = , the -2LE and -1LI performance and static and dynamic power is and AC characteristics are specified in extended (E) and industrial (I) temperature ranges.

S u m m a r y The Xilinx® Zynq® UltraScale+™ RFSoCs are available in -2 and -1 speed grades, with -2E devices having the highest performance. The -2LE and -1LI devices can operate at a VCCINT voltage at 0.85V or 0.72V and are screened for lower maximum static power. When operated at VCCINT = 0.85V, using -2LE and -1LI devices, the speed specification for the L

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Transcription of each temperature range. speed grade (that is, the D …

1 SummaryThe Xilinx Zynq UltraScale+ RFSoCs are available in -2 and -1 speed grades, with -2E devices having thehighest performance. The -2LE and -1LI devices can operate at a VCCINT voltage at or and arescreened for lower maximum static power. When operated at VCCINT = , using -2LE and -1LI devices, thespeed specification for the L devices is the same as the -2I or -1I speed grades. When operated atVCCINT = , the -2LE and -1LI performance and static and dynamic power is and AC characteristics are specified in extended (E) and industrial (I) temperature ranges.

2 Except theoperating temperature range or unless otherwise noted, all the DC and AC electrical parameters are the samefor a particular speed grade (that is, the timing characteristics of a -1 speed grade extended device are the sameas for a -1 speed grade industrial device). However, only selected speed grades and/or devices are available ineach temperature supply voltage and junction temperature specifications are representative of worst-case conditions. Theparameters included are common to popular designs and typical data sheet, part of an overall set of documentation on the Zynq UltraScale+ RFSoCs, is available on theXilinx website at CharacteristicsAbsolute Maximum RatingsTable 1.

3 Absolute Maximum RatingsSymbolDescription1 MinMaxUnitsProcessor System (PS)VCC_PSINTFPPS primary logic full-power domain supply voltage primary logic low-power domain supply voltage auxiliary supply voltage DDR controller and PHY supply voltage SYSMON ADC supply voltage relative to GND_PSADC PLL supply voltage UltraScale+ RFSoC Data Sheet:DC and AC Switching CharacteristicsDS926 ( ) August 1, 2018 Product Specification Copyright 2017-2018 Xilinx, Inc. Xilinx, the Xilinx logo, Artix, ISE, Kintex, Spartan, Virtex, Vivado, Zynq, and other designated brands includedherein are trademarks of Xilinx in the United States and other countries.

4 AMBA, AMBA Designer, ARM, ARM1176JZ-S, CoreSight, Cortex, andPrimeCell are trademarks of ARM in the EU and other countries. PCI, PCI Express, PCIe, and PCI-X are trademarks of PCI-SIG. All othertrademarks are the property of their respective ( ) August 1, 2018 [placeholder placeholder place]Product Specification 1 Send FeedbackTable 1: Absolute Maximum Ratings (cont'd)SymbolDescription1 MinMaxUnitsVPS_MGTRAVCCPS-GTR supply voltage termination voltage reference clock input voltage receiver input voltage DDR I/O supply voltage DDR PLL supply voltage I/O supply I/O input voltage + DDR I/O input voltage + battery-backed RAM and battery-backed real-time clock (RTC)supply voltage Logic (PL)

5 VCCINTI nternal supply voltage supply voltage for the I/O banks supply voltage voltage for the block RAM memories drivers supply voltage for HD I/O banks drivers supply voltage for HP I/O banks supply voltage for the I/O banks reference voltage , 5, 6I/O input voltage for HD I/O banks + input voltage for HP I/O banks + output current at the pad 2020mAIRMSA vailable RMS output current at the pad 2020mAGTY Transceiver7 VMGTAVCCA nalog supply voltage for transceiver circuits supply voltage for transceiver termination circuits analog Quad PLL (QPLL) voltage supply for transceivers reference clock absolute input voltage supply voltage for the resistor calibration circuit of thetransceiver column (RXP/RXN) and transmitter (TXP/TXN)

6 Absolute inputvoltage input current for receiver input pins DC coupled RXtermination = floating8 10mAIDCIN-MGTAVTTDC input current for receiver input pins DC coupled RXtermination = VMGTAVTT 10mAIDCIN-GNDDC input current for receiver input pins DC coupled RXtermination = GND9 0mAIDCIN-PROGDC input current for receiver input pins DC coupled RXtermination = programmable10 0mAIDCOUT-FLOATDC output current for transmitter pins DC coupled RXtermination = floating 6mAIDCOUT-MGTAVTTDC output current for transmitter pins DC coupled RXtermination = VMGTAVTT 6mAZynq UltraScale+ RFSoC Data Sheet: DC and AC Switching CharacteristicsDS926 ( ) August 1, 2018 [placeholder placeholder place]Product Specification 2 Send FeedbackTable 1.

7 Absolute Maximum Ratings (cont'd)SymbolDescription1 MinMaxUnitsRF-ADC, RF-DAC, and SD-FECVADC_AVCCADC and PLL supply voltage buffer and PLL supply voltage and PLL supply voltage buffer and PLL supply voltage on-die 50 termination supply voltage down converter supply voltage supply voltage , DAC_CLK, and SYSREF input voltage input voltage System MonitorVCCADCPL System Monitor supply relative to GNDADC System Monitor reference input relative to GNDADC temperature (ambient) 65150 CTSOLM aximum dry rework soldering temperature 260 CMaximum reflow soldering temperature 245 CTjMaximum junction temperature 125 CNotes:1.

8 Stresses beyond those listed under Absolute Maximum Ratings might cause permanent damage to the device. These are stress ratingsonly, and functional operation of the device at these or any other conditions beyond those listed under Operating Conditions is notimplied. Exposure to Absolute Maximum Ratings conditions for extended periods of time might affect device When operating outside of the recommended operating conditions, refer to Table 6, Table 7, and Table 8 for maximum overshoot andundershoot VCCINT_IO must be connected to VCCAUX_IO must be connected to The lower absolute voltage specification always For I/O operation, see the UltraScale Architecture SelectIO Resources User Guide (UG571)7.

9 For more information on supported GTY transceiver terminations see the UltraScale Architecture GTY Transceivers User Guide (UG578).8. AC coupled operation is not supported for RX termination = For GTY transceivers, DC coupled operation is not supported for RX termination = DC coupled operation is not supported for RX termination = For soldering guidelines and thermal considerations, see the Zynq UltraScale+ Device Packaging and Pinouts Product Specification UserGuide (UG1075).Recommended Operating ConditionsTable 2: Recommended Operating ConditionsSymbolDescription1, 2 MinTypMaxUnitsProcessor SystemVCC_PSINTFP3PS full-power domain supply -1LI, -2LI, and -2LE (VCCINT = ) devices: PS full-powerdomain supply UltraScale+ RFSoC Data Sheet: DC and AC Switching CharacteristicsDS926 ( ) August 1, 2018 [placeholder placeholder place]Product Specification 3 Send FeedbackTable 2.

10 Recommended Operating Conditions (cont'd)SymbolDescription1, 2 MinTypMaxUnitsVCC_PSINTLPPS low-power domain supply -1LI, -2LI, and -2LE (VCCINT = ) devices: PS low-powerdomain supply auxiliary supply DDR controller and PHY supply -1LI, -2LI, and -2LE (VCCINT = ) devices: PS DDR controllerand PHY supply SYSMON ADC supply voltage relative to PLL supply supply termination DDR I/O supply DDR PLL supply I/O I/O input voltage VCCO_PSIO + DDR I/O input voltage VCCO_PSDDR + battery-backed RAM and battery-backed real-time clock (RTC)supply LogicVCCINTPL internal supply -1LI, -2LI, and -2LE (VCCINT = ) devices: PL internal internal supply voltage for the I/O -1LI, -2LI, and -2LE (VCCINT = ) devices.


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