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FAILURE MECHANISM BASED STRESS TEST QUALIFICATION …

AEC - Q101 - Rev - E March 1, 2021 FAILURE MECHANISM BASED STRESS TEST QUALIFICATION FOR DISCRETE SEMICONDUCTORS IN AUTOMOTIVE APPLICATIONS Component Technical CommitteeAutomotive Electronics Council AEC - Q101 - Rev - E March 1, 2021 Component Technical CommitteeAutomotive Electronics CouncilTABLE OF CONTENTS AEC-Q101 FAILURE MECHANISM BASED STRESS Test QUALIFICATION for Discrete Semiconductors in Automotive Applications Appendix 1: Definition of a QUALIFICATION Family Appendix 2: Q101 Certification of Design, Construction and QUALIFICATION Appendix 3: QUALIFICATION Plan Appendix 4: Data Presentation Format Appendix 5: Minimum Parametric Test Requirements Appendix 6: Plastic Package Opening for Wire Bond Testing and Inspection Appendix 7: AEC-Q101 and the Use of Mission Profiles Attachments AEC-Q101-001: Electrostatic Discharge Test - Human Body Model AEC-Q101-002: Electrostatic Discharge Test - Machine Model (DECOMMISSIONED) AEC-Q101-003: Wire Bond Shear T

IATF 16949 1.2.5 Decommissioned AEC-Q101-002 Machine Model (MM) Electrostatic Discharge (ESD) Test • Removed from JEDEC due to obsolescence. HBM and CDM cover virtually all known ESD-related failure mechanisms. 1.3 Definitions 1.3.1 AEC Q101 Qualification

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Transcription of FAILURE MECHANISM BASED STRESS TEST QUALIFICATION …

1 AEC - Q101 - Rev - E March 1, 2021 FAILURE MECHANISM BASED STRESS TEST QUALIFICATION FOR DISCRETE SEMICONDUCTORS IN AUTOMOTIVE APPLICATIONS Component Technical CommitteeAutomotive Electronics Council AEC - Q101 - Rev - E March 1, 2021 Component Technical CommitteeAutomotive Electronics CouncilTABLE OF CONTENTS AEC-Q101 FAILURE MECHANISM BASED STRESS Test QUALIFICATION for Discrete Semiconductors in Automotive Applications Appendix 1: Definition of a QUALIFICATION Family Appendix 2: Q101 Certification of Design, Construction and QUALIFICATION Appendix 3: QUALIFICATION Plan Appendix 4: Data Presentation Format Appendix 5: Minimum Parametric Test Requirements Appendix 6: Plastic Package Opening for Wire Bond Testing and Inspection Appendix 7: AEC-Q101 and the Use of Mission Profiles Attachments AEC-Q101-001: Electrostatic Discharge Test - Human Body Model AEC-Q101-002: Electrostatic Discharge Test - Machine Model (DECOMMISSIONED) AEC-Q101-003: Wire Bond Shear Test AEC-Q101-004: Miscellaneous Test Methods AEC-Q101-005: Electrostatic Discharge Test Charged Device Model AEC-Q101-006.

2 Short Circuit Reliability Characterization of Smart Power Devices for 12V Systems AEC - Q101 - Rev - E March 1, 2021 Component Technical CommitteeAutomotive Electronics CouncilAcknowledgment Any document involving a complex technology brings together experience and skills from many sources. The Automotive Electronics Council would especially like to recognize the following significant contributors to the revision of this document: AEC Q101 Sub-Committee Members: Mark A. Kelly [Q101 Sponsor] Aptiv Mark Sears Bose Jeff Jarvis CCDC-AvMC Rick Forster Continental Corporation John Timms Continental Corporation Pam Finer Diodes Incorporated Frank Chen Diodes Incorporated Drew Hoffman Gentex Corporation Steve Sibrel Harman Uwe Berger Hella Werner Kanert Infineon Scott Daniels Infineon Gary Fisher Johnson Controls Colman Byrne Kostal Mike Buzinski Microchip Andreas Pinkernelle Nexperia Bob Knoell [Sub-Committee Co-Chair] NXP Semiconductors Zhongning Liang NXP Semiconductors Rene Rongen NXP Semiconductors Peter Turlo [Sub-Committee Co-Chair] ON Semiconductor Jason M.

3 Engel Silicon Labs Bassel Atala STMicroelectronics Larry Ting Texas Instruments Arthur Chiang Vishay HJ Lin Vishay Larry Dudley ZF This document is dedicated in memoriam to: Bob Knoell (1957-2018) AEC - Q101 - Rev - E March 1, 2021 Component Technical CommitteeAutomotive Electronics CouncilNOTICE AEC documents contain material that has been prepared, reviewed, and approved through the AEC Technical Committee. AEC documents are designed to serve the automotive electronics industry through eliminating misunderstandings between manufacturers and purchasers, facilitating interchangeability and improvement of products, and assisting the purchaser in selecting and obtaining with minimum delay the proper product for use by those other than AEC members, whether the standard is to be used either domestically or internationally.

4 AEC documents are adopted without regard to whether or not their adoption may involve patents or articles, materials, or processes. By such action AEC does not assume any liability to any patent owner, nor does it assume any obligation whatever to parties adopting the AEC documents. The information included in AEC documents represents a sound approach to product specification and application, principally from the automotive electronics system manufacturer viewpoint. No claims to be in Conformance with this document shall be made unless all requirements stated in the document are met. Inquiries, comments, and suggestions relative to the content of this AEC document should be addressed to the AEC Technical Committee on the link Published by the Automotive Electronics Council.

5 This document may be downloaded free of charge, however AEC retains the copyright on this material. By downloading this file, the individual agrees not to charge for or resell the resulting material. Printed in the All rights reserved Copyright 2021 by the Sustaining Members of the Automotive Electronics Council. This document may be freely reprinted with this copyright notice. This document cannot be changed without approval from the AEC Component Technical Committee. AEC - Q101 - Rev - E March 1, 2021 Page 1 of 38 Component Technical CommitteeAutomotive Electronics CouncilFAILURE MECHANISM BASED STRESS TEST QUALIFICATION FOR DISCRETE SEMICONDUCTORS IN AUTOMOTIVE APPLICATIONS Text enhancements and differences made since the last revision of this document are shown as underlined areas.

6 Several figures and tables have also been revised, but changes to these areas have not been underlined. Unless otherwise stated herein, the date of implementation of this standard for new qualifications and re-qualifications is as of the publish date above. 1. SCOPE This document defines minimum STRESS test driven QUALIFICATION requirements and references test conditions for QUALIFICATION of discrete semiconductors ( transistors, diodes, etc.). This document does not relieve the supplier of their responsibility to meet their own company's internal QUALIFICATION program. Additionally, this document does not relieve the supplier from meeting any user requirements outside the scope of this document.

7 In this document, "user" is defined as any company developing or using a discrete semiconductor part in production. The user is responsible to confirm and validate all QUALIFICATION and assessment data that substantiates conformance to this document. Purpose The purpose of this specification is to determine that a part is capable of passing the specified STRESS tests and thus can be expected to give a certain level of quality / reliability in the application. Reference Documents Current revision of the referenced documents will be in effect at the date of agreement to the QUALIFICATION plan. Subsequent QUALIFICATION plans will automatically use updated revisions of these referenced documents.

8 Military MIL-STD-750 Test Methods for Semiconductor Devices Industrial UL-STD-94 Test for Flammability of Plastic Materials of Parts in Devices and Appliances. JEDEC JESD-22 Reliability Test Methods for Packaged Devices J-STD-002 Solderability Tests for Component Leads, Terminations, Lugs, Terminals and Wires. J-STD-020 Moisture/Reflow Sensitivity Classification for Nonhermetic Solid State Surface Mount Devices JESD22-A113 Preconditioning of Nonhermetic Surface Mount Devices Prior to Reliability Testing JEDEC/IPC J-STD-035 Acoustic Microscopy for Nonhermetic Encapsulated Electronic Components AEC - Q101 - Rev - E March 1, 2021 Page 2 of 38 Component Technical CommitteeAutomotive Electronics Automotive AEC-Q001 Guidelines for Part Average Testing AEC-Q005 Pb-Free Test Requirements AEC-Q006 QUALIFICATION Requirements for Components Using Copper (Cu) Wire Interconnections AEC-Q101-001 Human Body Model (HBM) Electrostatic Discharge (ESD)

9 Test AEC-Q101-003 Wire Bond Shear Test AEC-Q101-004 Miscellaneous Test Methods Unclamped Inductive Switching Dielectric Integrity Destructive Physical Analysis AEC-Q101-005 Charged Device Model (CDM) Electrostatic Discharge (ESD) Test AEC-Q101-006 Short Circuit Reliability Characterization of Smart Power Devices for 12V Systems Other iatf 16949 Decommissioned AEC-Q101-002 Machine Model (MM) Electrostatic Discharge (ESD) Test Removed from JEDEC due to obsolescence. HBM and CDM cover virtually all known ESD-related FAILURE mechanisms. Definitions AEC Q101 QUALIFICATION Successful completion and documentation of the test results from requirements outlined in this document allows the supplier to claim that the part is AEC-Q101 qualified.

10 The supplier, in agreement with the user, can perform QUALIFICATION at sample sizes and conditions less stringent than what this document requires. However, that part cannot be considered AEC-Q101 qualified until such time that the unfulfilled requirements have been successfully completed. Note that there are no "certifications" for AEC-Q101 QUALIFICATION and there is no certification board run by AEC to qualify parts. The minimum ambient temperature range for discrete semiconductors per this specification shall be -40 C to +125 C operational. Any parts being qualified with Cu wire must follow the requirements in AEC-Q006. The test requirements in AEC-Q006 supersede what is in this document.


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