FineSim - Synopsys

1 DATASHEET. FineSim Multi-core/ Overview multi-machine FineSim is a high-performance circuit simulator with built-in full SPICE and FastSPICE. simulation engines. FineSim 's unique multi-core/multi-machine simulation capability enabled full-chip allows users to drastically improve simulation performance and capacity. FineSim is circuit-level well-suited for simulation of large, complex analog circuits, as well as DRAM/SRAM/. Flash memory design. simulation Introduction Typically, analog and digital blocks are verified independently with different simulation technology that varies in accuracy. When analog and digital blocks are combined in one simulation, due to capacity limitations of traditional simulators, verifying them together usually requires some additional modeling techniques that only approximate circuit behavior.

2 In some cases, this can introduce false design errors causing engineers to spend a significant amount of time searching for the root cause. As mixed-signal designs increase in size and complexity, the ability to correctly verify functional performance becomes extremely challenging. However, introducing fully-extracted post-layout parasitics to the functional verification process becomes virtually impossible. FineSim is the first single executable product that allows designers to functionally verify mixed-signal SoCs seamlessly without the overhead of traditional solutions. In addition to enabling the designer to work with detailed parasitic information, the designer has complete control of accuracy vs.

3 Performance tradeoffs. Accuracy Speed and capacity Cache CPU. ADC. SRAM SRAM core CPU. DAC. core Digital logic Cntl CPU. DAC. core Cache SRAM SRAM CPU. ADC. core FineSim SPICE FineSim Pro . Figure 1: FineSim multi-core/multi-machine full-chip circuit simulation Features Combination of accuracy and performance in a single executable allows large, mixed-signal designs to be simulated with very accurate SPICE and FastSPICE solving techniques. This provides complete control of speed vs. accuracy tradeoffs throughout the entire design verification process Multi-core/multi-machine simulation delivers silicon-accurate results for very large complex systems (10M+ transistors).

4 This revolutionary technology enables true SPICE simulation over multiple cores and provides linear scaling for both performance and capacity Provides unmatched performance through advanced SPICE and FastSPICE solvers, improving runtimes by 3X to 10X for single core simulations. With multi-core simulations, the performance scales linearly per core and can increase 20X to 30X or more, in some cases Achieves silicon-accurate results for all analog, mixed-signal, memory, custom digital and SoC designs that typically present simulation closure challenges, including PLLs, ADCs, SerDes, power management, charge pumps, and memories Runtime PHY, memories Weeks SerDes >32 cores PLL, ADC.

5 Days 16-20 cores 8-12 cores Hours 50K 100-500K >500K. Circuit size Figure 2: FineSim , with multi-core processing, significantly reduces simulation runtime Simulation Accuracy and Performance With an improved architecture and better numerical solvers, FineSim delivers a 3X to 10X performance increase on a single core over existing commercial SPICE and FastSPICE simulators. FineSim allows the designer to take advantage of multiple circuit-solving techniques, such as hierarchical simulation recognition for memory structures, or multi-rate techniques for sensitive analog circuits and advanced RC reduction algorithms. When multiple cores are used, the simulation performance can exceed 30X performance compared to other commercially-available products that use a single core, and also enables the handling of very large designs.

6 Superior Simulation Capacity FineSim enables SPICE-accurate analysis of very large, complex digital and analog/mixed-signal designs using multiple cores, achieving silicon accuracy never before possible in SPICE. Using multiple cores, FineSim has accurately simulated designs with multi- million transistors in full SPICE and matched measurements taken from silicon. Static and Dynamic Electromigration and Voltage Drop Analysis FineSim has an optional package for static and dynamic power analysis, as well as electromigration (EM) analysis. Designers can accurately calculate peak, average, and root-mean-square current values and graphically display and grade the results by severity levels for a quick visual analysis.

7 2. Netlist Models DSPF Stimulus FineSim simulation No iterations IR drop/EM analysis RC reduction Multi-core IR drop EM DB. DB. View results EM rules IR rules Figure 3: Static and dynamic EM and IR-drop analysis flow Advanced Statistical Analysis FineSim has an optional package for advanced statistical analysis. Designers can specify performance goals and accuracy tolerance, allowing the employment of multiple sampling techniques to drastically improve overall runtime performance vs. traditional Monte Carlo. Technology Features Multi-core/multi-machine capability increases performance and capacity Supports industry-standard netlist formats: HSPICE , Spectre, Eldo, Verilog-A and s-parameters Supports standard output formats for data analysis (TRO, FSDB, WDF, PSF).

8 Performs DC, transient, AC, transient noise and Monte Carlo analysis Supports Verilog and VHDL co-simulation Supports DSPF back-annotation and accurate RC reduction Integrated with SiliconSmart library characterization Applications Custom analog and mixed-signal Memory, FPGA, custom digital and SoC designs Library characterization Device Model Support MOSFET models, including the latest versions of BSIM3, BSIM4, PSP, HISIM, Philips MOS9 & MOS11, EKV, BSIMSOI, TFT, BSIM-CMG, UTSOI. BJT models, including the latest versions of Gummel-Poon, VBIC , HiCUM0 & HiCUM2, Mextram, as well as diode, RLC, TSMC. Model Interface (TMI) and AgeMOS models Platform Support Redhat Enterprise V5, SUSE Linux 9 and 10 (32-bit and 64-bit).

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