High Speed Optocoupler, 10 MBd - Vishay Intertechnology

1 6N137A. Vishay Semiconductors High Speed Optocoupler, 10 MBd FEATURES. NC 1 8 V. CC. CMR performance of 1 kV/ s A 2 7 V. E High Speed : 10 MBd typical C 3 6 VO. LSTTL/TTL compatibility NC 4 5 GND. Low input current capability: 5 mA. 6N137A Material categorization: . For definitions of compliance please see Truth Table (Positive Logic). LED ENABLE OUTPUT APPLICATIONS. ON H L. OFF H H. Microprocessor system interface ON L H PLC, ATE input/output isolation OFF L H Computer peripheral interface 18921-35. ON NC L. OFF NC H Digital fieldbus isolation: CC-link, DeviceNet, profibus, SDS. DESCRIPTION High Speed A/D and D/A conversion The 6N137A is single channel 10 MBd optocouplers utilizing AC plasma display panel level shifting a high efficient input LED coupled to a very high Speed Multiplexed data transmission integrated photo-detector logic gate with a strobable output.

2 This detector features an open collector. The internal Digital control power supply shield provides a guaranteed common mode transient Ground loop elimination . immunity of 1 kV/ s. The use of a F bypass capacitor . connected between pin 5 and 8 is recommended.. AGENCY APPROVALS . (Parts are certified under base model 6N137A) . UL1577 file number: E52744, double protection .. cUL tested to CSA bulletin 5A . DIN EN 60747-5-5 (VDE 0884-5), available with option 1. CQC GB8898, ORDERING INFORMATION. 6 N 1 3 7 A - X 0 0 # T DIP-8 Option 7. PART NUMBER PACKAGE OPTION TAPE. AND mm > 7 mm REEL. AGENCY CERTIFIED/PACKAGE CMR (V/ s). UL, cUL, CQC 1000. DIP-8 6N137A.

3 SMD-8, option 7 6N137A-X007T. VDE, UL, cUL, CQC 1000. DIP-8 6N137A-X001. SMD-8, option 7 6N137A-X017T. Note Additional options may be possible, please contact sales office. Rev. , 22-May-13 1 Document Number: 84131. For technical questions, contact: THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT. ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT 6N137A. Vishay Semiconductors ABSOLUTE MAXIMUM RATINGS (Tamb = 25 C, unless otherwise specified). PARAMETER TEST CONDITION SYMBOL VALUE UNIT. INPUT. Average forward current IF 20 mA. Reverse input voltage VR 5 V. Enable input voltage VE VCC + V V. Enable input current IE 5 mA.

4 Output power dissipation Pdiss 35 mW. OUTPUT. Supply voltage 1 min maximum VCC 7 V. Output current IO 50 mA. Output voltage VO 7 V. Output power dissipation Pdiss 85 mW. COUPLER. Isolation test voltage t = 1 min VISO 5000 VRMS. Storage temperature Tstg - 55 to + 125 C. Operating temperature Tamb - 40 to + 85 C. Solder reflow temperature (1) 5s 260 C. Notes Stresses in excess of the absolute maximum ratings can cause permanent damage to the device. Functional operation of the device is not implied at these or any other conditions in excess of those given in the operational sections of this document. Exposure to absolute maximum ratings for extended periods of the time can adversely affect reliability.

5 (1) Refer to reflow profile for soldering conditions for surface mounted devices (SMD). Refer to wave profile for soldering conditions for through hole devices (DIP). 100. Ptot - Total Power Dissipation (mW). Output 80. 60. Input 40. 20. 0. 0 25 50 75 100. Tamb - Ambient Temperature ( C). Fig. 1 - Total Power Dissipation vs. Ambient Temperature RECOMMENDED OPERATING CONDITIONS. PARAMETER TEST CONDITION SYMBOL MIN. MAX. UNIT. Operating temperature Tamb - 40 85 C. Supply voltage VCC V. Input current low level IFL 0 250 A. Input current high level IFH 5 15 mA. Logic high enable voltage VEH 2 VCC V. Logic low enable voltage VEL 0 V. Output pull up resistor RL 330 4K.

6 Fanout RL = 1 k N 5 - Rev. , 22-May-13 2 Document Number: 84131. For technical questions, contact: THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT. ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT 6N137A. Vishay Semiconductors ELECTRICAL CHARACTERSITCS (Tamb = 25 C, unless otherwise specified). PARAMETER TEST CONDITION SYMBOL MIN. TYP. MAX. UNIT. INPUT. Input forward voltage IF = 10 mA VF V. Input forward voltage . IF = 10 mA VF/ T - mV/K. temperature coefficient Input reverse voltage IR = 10 A BVR 5 V. VE = 2 V, VCC = V, Input threshold current ITH 5 mA. IOL (sinking) = 13 mA. Input capacitance f = 1 MHz, VF = 0 V CI 28 pF.

7 OUTPUT. VE = V, IF = 0 mA 8 10. High level supply current ICCH mA. VE = VCC, IF = 10 mA VE = V, IF = 0 mA 10 13. Low level supply current ICCL mA. VE = VCC, IF = 10 mA 8. High level enable current VE = 2 V IEH - - mA. Low level enable current VE = V IEL - - mA. High level enable voltage VEH 2 V. Low level enable voltage VEL V. VE = 2 V, VCC = V, High level output current IOH 100 A. VO = V, IF = 250 A. VE = 2 V, VCC = V, Low level output voltage VOL V. IF = 5 mA, IOL (sinking) = 13 mA. Collector emitter capacitance f = 1 MHz, Tamb = 25 C CIO 4 pF. COUPLER. Coupling capacitance f = 1 MHz, Tamb = 25 C CIO pF. Note Minimum and maximum values are testing requirements.

8 Typical values are characteristics of the device and are the result of engineering evaluation. Typical values are for information only and are not part of the testing requirements. SWITCHING CHARACTERISTICS. PARAMETER TEST CONDITION SYMBOL MIN. TYP. MAX. UNIT. Propagation delay time to . RL = 350 , CL = 15 pF tPLH 25 45 75 (1) ns high output level Propagation delay time to . RL = 350 , CL = 15 pF tPHL 25 32 75 (1) ns low output level Pulse width distortion RL = 350 , CL = 15 pF |tPHL - tPLH| 13 35 ns Propagation delay skew RL = 350 , CL = 15 pF tPSK 16 40 ns Output rise time (10 % to 90 %) RL = 350 , CL = 15 pF tr 27 ns Output fall time (90 % to 10 %) RL = 350 , CL = 15 pF tf 10 ns Propagation delay time of RL = 350 , CL = 15 pF, tELH 47 ns enable from VEH to VEL VEL = 0 V, VEH = 3 V.

9 Propagation delay time of RL = 350 , CL = 15 pF, tEHL 24 ns enable from VEL to VEH VEL = 0 V, VEH = 3 V. Notes Over recommended temperature (Tamb = - 40 C to + 85 C), VCC = 5 V, IF = mA, unless otherwise specified. Typical values applies to VCC = 5 V, Tamb = 25 C. (1) A JEDEC registered data for 6N137A. Rev. , 22-May-13 3 Document Number: 84131. For technical questions, contact: THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT. ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT 6N137A. Vishay Semiconductors VCC. Pulse gen. 1 VCC 8 RL. Zo = 50 IF IF = mA. t f = t r = 5 ns VE. 2 7 Input IF IF = mA. F. VOUT bypass Output VO 0 mA.

10 Input IF monitoring 3 6 VOH. monitoring node Output VO V. node RM 4 5 C L = 15 pF VOL. GND. t PHL t PLH. The probe and Jig capacitances are included in C L 18964-7. Fig. 2 - Test Circuit for tPLH, tPHL, tr, and tf Pulse gen. Input VE. Zo = 50 monitoring node VCC. t f = t r = 5 ns 1 VCC 8 RL. 3V. mA VE Output VO Input VE V. 2 7 F monitoring IF VOUT tEHL. bypass node 3 6 tELH. CL = 15 pF Output VO. 4 5 V. GND. The probe and Jig capacitances are included in CL 18975-5. Fig. 3 - Test Circuit for tEHL, and tELH. COMMON MODE TRANSIENT IMMUNITY. PARAMETER TEST CONDITION SYMBOL MIN. TYP. MAX. UNIT. Logic high common mode |VCM| = 50 V, VCC = 5 V, IF = 0 mA, |CMH| 1000 V/ s transient immunity (1)(3) VO(min.)