HIGH TEMPERATURE 83C51 HT83C51 MICROCONTROLLER

1 HTMOSTM high TEMPERATURE Products Preliminary high TEMPERATURE 83C51 HT83C51 . MICROCONTROLLER . FEATURES. HTMOS Specified Over -55 to +225 C Hermetic 40-Pin Ceramic DIP. 8-bit CPU Optimized For 5 Volt Control applications 64K External Data Memory Address Space Four 8-bit Bidirectional Parallel Ports 256 Bytes Internal Data Memory Three 16-bit Timer/Counters with One Up/Down 8K Byte Mask ROM. Timer/Counter and Clock Out On-Chip Oscillator Programmable Counter Array with: MCS-51 Compatible Instruction Set Capture/Compare Software Timer with Watchdog Capability high Speed Output applications . Pulse Width Modulator Down-Hole Oil Well Interrupt Structure with Seven Sources and Avionics Four Priority Levels Turbine Engine Control Half Duplex Programmable Serial Port with: Framing Error Detection Industrial Process Control Automatic Address Recognition Nuclear Reactor 64K External Program Memory Address Space Electric Power Conversion Heavy Duty Internal Combustion Engines GENERAL DESCRIPTION.

2 The HT83C51 is a monolithic 8-bit MICROCONTROLLER that is and a hierarchical interrupt structure. Software selectable pin equivalent to the Intel 8XC51FC MICROCONTROLLER . Fab- idle is included for reduced power. The HT83C51 varies ricated with Honeywell's dielectrically isolated high -tem- from the standard 83C51FC, in that it supports half-duplex perature (HTMOS ) process, it is designed specifically for serial communication, and has 8K Bytes of Mask program- severe high - TEMPERATURE applications such as down-hole mable ROM. The device is available in a standard pinout oil well, aerospace, turbine engine and industrial control. DIP, with optional packages considered.

3 The HT83C51 uses the standard MCS-51 instruction set These microcontrollers provide guaranteed performance which is optimized for control applications . Pin-for-pin supporting operating frequencies in excess of 16 MHz equivalent to the MCS-51 series product, it is compatible over the full -55 to +225 C TEMPERATURE range. Typically, with all known development environments. Key features parts will operate up to +300 C for a year, with derated include the programmable counter array, watch dog timer, performance. All parts are burned in at 250 C to eliminate enhanced serial port for multi-processor communication infant mortality. Solid State Electronics Center 12001 State Highway 55, Plymouth, MN 55441 (800) 323-8295 HT83C51 .

4 FUNCTIONAL BLOCK DIAGRAM. - - Port O Port 2. Drivers Drivers RAM Addr. Register Port O Port 2 Program RAM. Latch Latch ROM. Program Address Register BB ACC Stack Register Register Pointer Buffer TMP2 TMP1. Special Function PC. ALU Registers, Incrementer Timers, PCA, Program PSW TMP3 Serial Port Counter Instruction DPTR. sequencer PSENn Register Micro- ALE. EAn Port 1 Port 3. RST Latch Latch Osc. Port 1 Port 3. Drivers Drivers XTAL1 XTAL2. - - 2. HT83C51 . PIN DESCRIPTIONS. VDD: +5V Supply Voltage loads. When the Port 3 pins have 1's written to them, they are pulled high by the internal pullups and can be used as VSS: Circuit Ground inputs in this state. As inputs, any pins that are externally pulled low will source current because of the pullups.

5 In Port 0 ( - ): Port 0 is an 8-bit bidirectional I/O port. addition, Port 3 pins have the alternate uses shown in the If external Program and/or Data memory are used, port 0 table below: cannot be used for general purpose I/O. During accesses to external Program and Data memory Port 0 is used as the Port Pin Alternate Name Alternate Function low-order multiplexed address and data bus. In this mode, Port 0 pins use strong internal pullups when emitting 1's, RXD Serial port input and are TTL compatible. If external Program and Data TXD Serial port output memory are not used, Port 0 pins can be used as general INT0n External interrupt 0. purpose I/O. When the Port pins have 1's written to them INT1n External interrupt 1.

6 In I/O mode, the pins are floating and can be driven as inputs. An external pullup is required to generate logic high T0 External clock input for Timer 0. output in I/O mode. T1 External clock input for Timer 1. WRn External Data Memory write strobe Port 1 ( - ): Port 1 is an 8-bit bidirectional I/O port with internal pullups. The output buffers can drive TTL RDn External Data Memory read strobe loads. When the Port 1 pins have 1's written to them, they are pulled high by the internal pullups and can be used as RST: Reset input. A high on this input for 2 or more inputs in this state. As inputs, any pins that are externally oscillator periods while the oscillator is running resets the pulled low will source current because of the pullups.

7 In device. All ports and Special Function Registers will be addition, Port 1 pins have the alternate uses shown in the reset to their default conditions. Internal data memory is table below: undefined after reset. Program execution will begin within 12 oscillator periods (one machine cycle) after the RST. Port Alternate Function signal is brought low. RST contains an internal pulldown Pin Name resistor to allow implementing power-up reset with only an T2 External clock input to timer/ Clock out external capacitor. Timer/Counter 2 Capture/Reload trigger and T2EX ALE: Address Latch Enable. The ALE output is a pulse for direction control ECI External count input to PCA.

8 Latching the low byte of the address during accesses to external memory. In normal operation the ALE pulse is CEX0 External I/O for PCA capture/compare Module 0. output every 6th oscillator cycle and may be used for CEX1 External I/O for PCA capture/compare Module 1 external timing or clocking. However, during each access CEX2 External I/O for PCA capture/compare Module 2 to external Data Memory (MOVX instruction), one ALE. CEX3 External I/O for PCA capture/compare Module 3 pulse is skipped. If desired, ALE operation can be disabled by setting bit 0 of SFR 8EH. When this bit is set, ALE is CEX4 External I/O for PCA capture/compare Module 4. active only during a MOVX instruction.

9 Otherwise, the pin is held low. When ALE is disabled, program execution Port 2 ( - ): Port 2 is an 8-bit bidirectional I/O port must be limited to the internal 8K program ROM. with internal pullups. The output buffers can drive TTL. loads. When the Port 2 pins have 1's written to them, they PSENn: Program Store Enable. This active low signal is are pulled high by the internal pullups and can be used as the read strobe to the external program memory. PSENn inputs in this state. As inputs, any pins that are externally is activated every 6th oscillator cycle except that 2 PSENn pulled low will source current because of the pullups. activations are skipped during external data memory accesses.

10 Port 2 is used as the high -order address byte during accesses to external Program Memory and during accesses EAn: External Access Enable. The EAn pin must be to external Data Memory that use 16-bit addresses ( strapped to VSS for the HT51 to fetch code from external MOVX It uses strong internal pullups when Program Memory locations 0000H to 1 FFFH. The EAn pin emitting 1's in this mode. During accesses to external Data must be strapped to VDD for internal program execution Memory that use 8 bit addresses, Port 2 emits the contents from memory locations 0000H to 1 FFFH. of the P2 SFR. XTAL1: Input to the inverting oscillator amplifier. Port 3 ( - ): Port 3 is an 8-bit bidirectional I/O port with internal pullups.)