Example: confidence

Interrupts C - Uppsala University

occurs, the processor latches that interrupt in the IRPTL register. The interrupt remains latched until it is serviced or cleared. If your application is about to setup an ISR for an interrupt, a meaningless occurrence of that interrupt could be pending. If you do not wish to service it, clear the interrupt before calling signal() or interrupt().

Tags:

  Processor, Interrupts

Information

Domain:

Source:

Link to this page:

Please notify us if you found a problem with this document:

Other abuse

Advertisement

Related search queries