Transcription of Investigating Page Sizes in NAND Flash Memory
1 Investigating Page Sizes in nand FlashMemory Gyu Sang Choi and Mankyu Sung1 Department of Information and CommunicationYeungnam University214-1, Dae-dong, Gyeongsan, Gyeongsangbuk, 712-749, of Game & Mobile ContentsKeimyung University1095 Dalgubeodaero, Dalseo-Gu, Daegu, 704-701, this paper, we investigated the performance issues of thepage Sizes in nand Flash Memory . We modified FlashSim to supportNAND Memory with multiple page Sizes and measured the performanceby using real Memory access workloads. Our results suggest that it isimportant to use similar page Sizes in nand Flash Memory comparedto page Sizes in virtual Memory system, to get the high performanceincomputing : Virtual Memory System, Virtual Page size , Storage Systems, nand Flash Memroy, Flash Translation Layer1 IntroductionIn this paper, we investigated the performance issues of the page Sizes of NANDF lash Memory .
2 In our experiments, we used the real Memory access traces whichare gathered by the authors in [1]. Our experimental results revealed that sim-ilar page Sizes in nand Flash Memory show the best performance across allworkloads, compared to the page size in virtual Memory system. In contrast, itincurs large performance deterioration if the page size in virtual Memory systemis smaller than that in nand Flash Memory , while there is less performancedegradation if the page size in virtual Memory system is greater than that inNAND Flash remainder of this paper is organized as follows. In Section 2, we presentperformance evaluation and the conclusions of this study are described in thelast Section.
3 This research was supported by Basic Science Research Program through the Na-tional Research Foundation of Korea(NRF) funded by the Ministry of Education,Science and Technology(2011-0008686)- 377 -2 Page Sizes in nand Flash MemoryNAND Flash Memory consists of two basic units, page and block. A page isa minimum unit to access data in nand Flash Memory and the page size istypically 2 or 4 Kbytes, while a block consists of 32 or 64 pages and an eraseoperation must be performed by a full block. In nand Flash Memory , the pagesize was initially 256 or 512 Bytes but is now 2 or 4 Kbytes, due to increasingits density. In addition, it is expected that nand Flash Memory with 8 or 16 Kbytes page size will be manufactored soon or the virtual Memory system [2], there is also a virtual page in Flash -basedSSD, called super-page, which consists of multiple physical pages across differ-ent nand Flash Memory chips.
4 The modern Flash -based SSD supports multiplechannels and ways to increase its bandwidth by accessing multiple physical pagesacross channels at the same time [3]. The channel can operate with other chan-nels independently and thus the access times for multiple chips across differentchannels could be overlapped, while the 2-way architecture can access two inter-leaved chips in the same channel at the same time. Thus, the actual access sizein Flash -based SSD could be 8/16 Kbytes, despite of that the physical page sizein nand Flash Memory is only 2 this paper, we will investigate the performance issues ofthe page Sizes inNAND Flash Memory . In our experiments, NAND2K, NAND4K, NAND8K,NAND16K, NAND32K and NAND64K represent nand Flash Memory or-ganizations with 2 Kbytes, 4 Kbytes, 8 Kbytes, 16 Kbytes, 32 Kbytes and 64 Kbytes pages , respectively.
5 In addition, we use the real Memory traces in [1]. Weconducted performance results of Flash -based SSD storage with real workloads,using the modified FlashSim [4, 5], by varying the page Sizes in nand Access Latency in nand Flash Memory (ms)Page Sizes in nand Flash Memory (Kbytes)248163264020406080100120140 Page Access Latency in nand Flash Memory (ms)Page Sizes in nand Flash Memory (Kbytes)(a) Netperf client workload(b) SPECJBB workloadFig. Comparison with Versatile Workloads- 378 -Figure 1 shows the performance results of versatile workloads. In this ex-periment, we vary the page size from 2 Kbytes to 64 Kbytes in nand Flashmemory. The SSD, which has the similar page size compared to the page size ofvirtual Memory , shows the best performance across all workloads.
6 In contrast,it shows the worst performance when the page size in nand Flash Memory islarger than that in virtual Memory system. This is because it must access thewhole page in nand Flash Memory , even though it needs the small portion ofthe , it might incur the significant performance deterioration. Besides, itshows moderate performance degradation when the page size in the virtual mem-ory is larger than that in nand Flash Memory , since it incurs small overheadto handle multiple pages in nand Flash Conclusions and Future WorkIn this paper, we investigated the performance issues of the page Sizes in NANDF lash Memory and conducted performance evaluation based on simulation method-ology with real Memory traces.
7 Our experimental results revealed that it is im-portant to use similar page Sizes in nand Flash Memory compared to NANDF lash Memory , to get the high performancein computing systems. In the future,we plan to investigate the performance issues of file system with a large pagesize in nand Flash Bao, Y., Chen, M., Ruan, Y., Liu, L., Fan, J., Yuan, Q., Song, B., Xu, J.: Hmtt:a platform independent full-system Memory trace monitoring system. In: Proceed-ings of the 2008 ACM SIGMETRICS international conference on Measurement andmodeling of computer systems. SIGMETRICS 08 (2008)2. Silberschatz, A., Galvin, , Gagne, G.: Operating System Concepts. 8th Publishing (2008)3.
8 Park, H., Shin, D.: Buffer Flush and Address Mapping Scheme for Flash MemorySolid-State Disk. Journal of Systems Architecture56(4-6) (2010) 208 2204. Choi, , On, : Study of the performance impact of a cache buffer in solid-state disks. Microprocessors and Microsystems - Embedded Hardware Design35(May 2011) 359 3695. Gyu Sang Choi, Ingyu Lee, , Im, C.: A hybrid ssd with pram and nand flashmemory. Microprocessors and Microsystems - Embedded Hardware Design36(May2012) 257 266- 379.