IS31FL3742 - ISSI

1 IS31FL3742 Integrated Silicon Solution, Inc. 1 Rev. A, 12/13/2017 30 6 DOTS MATRIX led driver December 2017 GENERAL DESCRIPTION The IS31FL3742 is a general purpose 30 6 LED Matrix programmed via an I2C compatible interface. Each LED can be dimmed individually with 8-bit PWM data and 8-bit scaling data which allowing 256 steps of linear PWM dimming and 256 steps of DC current adjustable level. Additionally each LED open and short state can be detected, IS31FL3742 store the open or short information in Open-Short Registers. The Open-Short Registers allowing MCU to read out via I2C compatible interface. Inform MCU whether there are LEDs open or short and the locations of open or short LEDs. The IS31FL3742 operates from to and features a very low shutdown and operational current. IS31FL3742 is available in QFN-48 (6mm 6mm) package. It operates from to over the temperature range of -40 C to +125 C.

2 FEATURES Supply voltage range: to 30 Current Sink 6 SW matrix size: drive up to 180 LEDs or 60 RGBs Individual 256 PWM control steps Individual 256 DC current steps Global 256 current setting SDB rising edge reset I2C module Programmable H/L logic: , 29kHz PWM frequency 1 MHz I2C-compatible interface interrupt and state lookup registers Individual open and short error detect function De-ghost QFN-48 (6mm 6mm) package APPLICATIONS Mobile phones and other hand-held devices for LED display Gaming device (Keyboard, mouse etc.) LED in write goods application Music box TYPICAL APPLICATION CIRCUIT Figure 1 Typical Application Circuit (Single Color: 30x6) SDASCLADDRIS31FL37421k1kVIO/MCU100kINTB1 00kGNDSW1SW2CS30CS29CS2CS1SW5SW6 SDBM icro , Integrated Silicon Solution, Inc.

3 2 Rev. A, 12/13/2017 TYPICAL APPLICATION CIRCUIT (CONTINUED) Figure 2 Typical Application Circuit (RGB Color: 10x6) Note: For the mobile applications the IC should be placed far away from the mobile antenna in order to prevent the SW2 SW3SW4SW5SW6 SDASCLADDRIS31FL37421k1kVIO/MCU100kINTB1 00kGNDSW1SW2CS30CS29CS2CS1SW5SW6 SDBM icro , Integrated Silicon Solution, Inc. 3 Rev. A, 12/13/2017 PIN CONFIGURATION Package Pin Configuration (Top View) QFN-48 PIN DESCRIPTION No. Pin Description 1, 9, 30 GND Power GND (1, 30) and analog GND (9). 20~29, 31~48, 2, 3 CS1~CS30 Current sink pin for LED matrix. 4 INTB Interrupt output pin. Register F0h sets the function of the INTB pin and active low when the interrupt event happens. Can be NC (float) if interrupt function no used.

4 5 ADDR I2C address select pin. 6 SDA I2C compatible serial data. 7 SCL I2C compatible serial clock. 8 SDB Shutdown pin. 10 R_EXT IOUT setting register. 11 AVCC Power for analog and digital circuits. 12,19 PVCC Power for current source. 13~18 SW1~SW6 Source/switch pin for LED matrix. Thermal Pad Need to connect to GND pins in PCB. IS31FL3742 Integrated Silicon Solution, Inc. 4 Rev. A, 12/13/2017 ORDERING INFORMATION Industrial Range: -40 C to +125 C Order Part No. Package QTY/Reel IS31FL3742 -QFLS4-TR QFN-48, Lead-free 2500 Copyright 2017 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice.

5 ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products. Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless Integrated Silicon Solution, Inc. receives written assurance to its satisfaction, that: a.) the risk of injury or damage has been minimized; b.) the user assume all such risks; and c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances IS31FL3742 Integrated Silicon Solution, Inc.

6 5 Rev. A, 12/13/2017 ABSOLUTE MAXIMUM RATINGS Supply voltage, VCC ~+ Voltage at any input pin ~ VCC+ Maximum junction temperature, TJMAX +150 C Storage temperature range, TSTG -65 C ~+150 C Operating temperature range, TA=TJ -40 C ~ +125 C Package thermal resistance, junction to ambient (4 layer standard test PCB based on JEDEC standard), JA C/W ESD (HBM) for SWx pins ESD (HBM) for other pins ESD (CDM) 2kV 5kV 1kV Note: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device.

7 These are stress ratings only and functional operation of the device at these or any other condition beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS The following specifications apply for VCC = , TA = 25 C, unless otherwise noted. Symbol Parameter Conditions Min. Typ. Max. UnitVCC Supply voltage V ICC Quiescent power supply current VSDB=VCC, all LEDs off mA ISD Shutdown current VSDB=0V A VSDB= VCC, Configuration Register written 0000 0000 IOUT(PEAK) Maximum constant current of CS1~CS30 REXT=10k , GCC=0xFF, SL=0xFF 38 REXT= , GCC=0xFF, SL=0xFF 23 IMATCH Output peak current mismatch between channels REXT=10k , GCC=0xFF, SL=0xFF (Note 1) -6 6 % ILED Average current on each LED ILED = IOUT(PEAK)

8 REXT=10k , GCC=0xFF, SL=0xFF mA VHR Current switch headroom voltage SW1~SW6 ISWITCH=800mA (Note 2,3) 400 mV Current sink headroom voltage CS1~CS30 ISINK=38mA (Note 2) 300 tSCAN Period of SWx scanning 32 s tNOL1 Non-overlap blanking time 1 during scan, the SWx are all off during this time 2 s tNOL2 Delay total time for CS1 to CS 30, during this time, the SWx is on but CSx is not all turned on 2 s IS31FL3742 Integrated Silicon Solution, Inc.

9 6 Rev. A, 12/13/2017 ELECTRICAL CHARACTERISTICS (CONTINUE) The following specifications apply for VCC = , TA = 25 C, unless otherwise noted. Symbol Parameter Conditions Min. Typ. Max. UnitLogic Electrical Characteristics (SDA, SCL, ADDR, SDB) VIL Logic 0 input voltage VCC= , LGC=0 V VCC= , LGC=1 VIH Logic 1 input voltage VCC= , LGC=0 V VCC= , LGC=1 VHYS Input schmitt trigger hysteresis VCC= , LGC=0 V VCC= , LGC=1 IIL Logic 0 input current VINPUT= L (Note 4) 5 nA IIH Logic 1 input current VINPUT= H (Note 4) 5 nA DIGITAL INPUT SWITCHING CHARACTERISTICS (NOTE 4) Symbol Parameter Fast Mode Fast Mode Plus UnitsMin. Typ. Max. Min.

10 Typ. Max. fSCL Serial-clock frequency - 400- 1000 kHz tBUF Bus free time between a STOP and a START condition - - s tHD, STA Hold time (repeated) START condition - - s tSU, STA Repeated START condition setup time - - s tSU, STO STOP condition setup time - - s tHD, DAT Data hold time - - - - s tSU, DAT Data setup time 100 - 50 - ns tLOW SCL clock low period - - s tHIGH SCL clock high period - - s tR Rise time of both SDA and SCL signals, receiving - 300- 120 ns tF Fall time of both SDA and SCL signals, receiving - 300- 120 ns Note 1: IMATCH= (IOUT(PEAK)- IAVG(PEAK))/IAVG(PEAK) 100%.