Transcription of KC705 EVALUATION PLATFORM HW-K7-KC705 D …
1 OfSheetDate:Title:Ver:ABCD1234 DCBA4321 Sheet Size: BRev:Drawn ByTHE DOCUMENTATION IS DISCLOSED TO YOU AS-IS WITH NO warranty OF ANY LOSS OF DATA OR LOST PROFITS, ARISING FROM YOUR USE OFCONSEQUENTIAL, INDIRECT, EXEMPLARY, SPECIAL, OR INCIDENTAL DAMAGES,OF THIRD-PARTY RIGHTS. IN NO EVENT WILL XILINX BE LIABLE FOR ANYMERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NONINFRINGEMENTSTATUTORY, REGARDING THE DOCUMENTATION, INCLUDING ANY WARRANTIES OFKIND. XILINX MAKES NO OTHER WARRANTIES, WHETHER EXPRESS, IMPLIED, ORXILINX IS DISCLOSING THIS USER GUIDE, MANUAL, RELEASE NOTE, SCHEMATIC,AND/OR SPECIFICATION (THE DOCUMENTATION ) TO YOU SOLELY FOR USE INTHE DEVELOPMENT OF DESIGNS TO OPERATE WITH XILINX HARDWARE MAY NOT REPRODUCE, DISTRIBUTE, REPUBLISH, DOWNLOAD, DISPLAY, POST,OR TRANSMIT THE DOCUMENTATION IN ANY FORM OR BY ANY MEANS INCLUDING,BUT NOT LIMITED TO, ELECTRONIC, MECHANICAL, PHOTOCOPYING, RECORDING,OR OTHERWISE, WITHOUT THE PRIOR WRITTEN CONSENT OF EXPRESSLY DISCLAIMS ANY LIABILITY ARISING OUT OF YOUR USE OFTHE DOCUMENTATION.
2 XILINX RESERVES THE RIGHT, AT ITS SOLE DISCRETION,TO CHANGE THE DOCUMENTATION WITHOUT NOTICE AT ANY TIME. XILINX ASSUMESNO OBLIGATION TO CORRECT ANY ERRORS CONTAINED IN THE DOCUMENTATION, ORTO ADVISE YOU OF ANY CORRECTIONS OR UPDATES. XILINX EXPRESSLYDISCLAIMS ANY LIABILITY IN CONNECTION WITH TECHNICAL SUPPORT ORASSISTANCE THAT MAY BE PROVIDED TO YOU IN CONNECTION WITH THESCHEM, ROHS COMPLIANTSCH P/N: 0381397 ASSY P/N: 0431641 PCB P/N: 1280565KC705 EVALUATION PLATFORMDISCLAIMERTHE XILINX HARDWARE, FPGA AND CPLD DEVICES REFERRED TO HEREIN ("PRODUCTS")ARE SUBJECT TO THE TERMS AND CONDITIONS OF THE XILINX LIMITED warranty WHICHCAN BE VIEWED AT THIS LIMITED WARRANTYDOES NOT EXTEND TO ANY USE OF PRODUCTS IN AN APPLICATION OR ENVIRONMENT THATIS NOT WITHIN THE SPECIFICATIONS STATED ON THE XILINX DATA SPECIFICATIONS ARE SUBJECT TO CHANGE WITHOUT ARE NOT DESIGNED OR INTENDED TO BE FAIL-SAFE, OR FOR USE IN ANYAPPLICATION REQUIRING FAIL-SAFE PERFORMANCE, SUCH AS LIFE-SUPPORT OR SAFETYDEVICES OR SYSTEMS, OR ANY OTHER APPLICATION THAT INVOKES THE POTENTIALRISKS OF DEATH, PERSONAL INJURY OR PROPERTY OR ENVIRONMENTAL DAMAGE("CRITICAL APPLICATIONS").
3 USE OF PRODUCTS IN CRITICAL APPLICATIONS IS ATTHE SOLE RISK OF CUSTOMER, SUBJECT TO APPLICABLE LAWS AND REGULATIONS. ALLSPECIFICATIONS ARE SUBJECT TO CHANGE WITHOUT : KC705 EVALUATION PLATFORM HW-K7-KC705 (XC7K325T -2 FFG900)4-2-2012_15 :Title:Ver:ABCD1234 DCBA4321 Sheet Size: BRev:Drawn Byboard please refer to the Bill of Materials delivered for that board. Further device and boardinformation can be found on HPCTDOTDIU1 FPGATDIJTAG LPCL inear RegulatorLinear RegulatorLinear RegulatorSwitching ModuleSwitching ModuleSwitching RegulatorLinear maxU1 JackSCHEM, ROHS COMPLIANTSMA ClockParallel FlashSCH P/N: 0381397 ASSY P/N: 0431641 PCB P/N: 1280565 DDR3 SODIMMMII/GMII/RGMII/SGMIIC onnectorsConnectorPCIe x8 EdgeLEDs, ButtonsSwitching RegulatorPower Controller 2 PWRS witching ModuleSwitching ModulePage 15 Linear RegulatorIIC AddressingKC705 Block DiagramKC705 EVALUATION PLATFORMK intex-7 SwitchesSFP CageVCCINT @ 20 ASwitching RegulatorVCCAUX (MGTVCCAUX)
4 @ 10 AVCC3V3 @ 10 AVADJ @ 10 AVCCAUX_IO @ @ Controller 1 Switching RegulatorVCC1V5 @ 10 AVCC2V5 @ 10 AMGTAVCC @ 10 AMGTAVTT @ 10 AXADC_VCC @ HeaderDDR3 SODIMMFMC HPCSFP+SI570 IIC EEPROMJTAG @ 300mAUSB Module orPage 16-2010/100/1000 EthernetFMC HPC/LPC12 VPage 25 MODE DIPSWITCHUSB UARTC onnectorJTAGPage 14 Page 22 Page 25 Page 26 Page 27 MGT SMAD ifferential ClockPage 23 Page 29 QSPILCD I/FPage 30 Page 21 Page 13 Page 31 IIC EEPROMPage 27 IIC MUXPage 32 MECHANICALSPage 44 Pages 35-43 HDMI VideoPage 33-34 PCA95480b00110000b10100000b10100000b1010 100 ADV75120b0111001 IRONWOOD FFG900 SOCKETSUPPORTS MULTIPLE DEVICESREFER TO BOARD BILL OFMATERIALS TO CONFIRM FPGAPROVIDEDP ower :15 GNDGNDVCC3V3 GNDDIRVCCBBVCCAGNDAGNDGNDofSheetDate:Tit le:Ver:ABCD1234 DCBA4321 Sheet Size: BRev:Drawn ByXXXVCC3V3 GRNREDDXN_0_U14 VCCADC_0_P15 GNDADC_0_P14 DXP_0_U15 VREFN_0_R14 VREFP_0_T15VP_0_R15VN_0_T14 VCCBATT_0_C10 CCLK_0_B10 TCK_0_E10 TMS_0_F10 TDO_0_G10 TDI_0_H10 INIT_B_0_A10 PROGRAM_B_0_K10 CFGBVS_0_L10 DONE_0_M10M2_0_AB1M0_0_AB5M1_0_AB2 VCCO_0_T9 VCCO_0_AB6XC7K325 TFFG900 BANK
5 0IO_0_12_Y20IO_L1P_T0_12_Y23IO_L1N_T0_12 _Y24IO_L2P_T0_12_Y21IO_L2N_T0_12_AA21IO_ L3P_T0_DQS_12_AB22IO_L3N_T0_DQS_12_AB23I O_L4P_T0_12_AA22IO_L4N_T0_12_AA23IO_L5P_ T0_12_AC20IO_L5N_T0_12_AC21IO_L6P_T0_12_ AA20IO_L6N_T0_VREF_12_AB20IO_L7P_T1_12_A B24IO_L7N_T1_12_AC25IO_L8P_T1_12_AC22IO_ L8N_T1_12_AD22IO_L9P_T1_DQS_12_AC24IO_L9 N_T1_DQS_12_AD24IO_L10P_T1_12_AD21IO_L10 N_T1_12_AE21IO_L11P_T1_SRCC_12_AE23IO_L1 1N_T1_SRCC_12_AF23IO_L12P_T1_MRCC_12_AD2 3IO_L12N_T1_MRCC_12_AE24IO_L13P_T2_MRCC_ 12_AF22IO_L13N_T2_MRCC_12_AG23IO_L14P_T2 _SRCC_12_AG24IO_L14N_T2_SRCC_12_AH24IO_L 15P_T2_DQS_12_AJ24IO_L15N_T2_DQS_12_AK25 IO_L16P_T2_12_AE25IO_L16N_T2_12_AF25IO_L 17P_T2_12_AK23IO_L17N_T2_12_AK24IO_L18P_ T2_12_AG25IO_L18N_T2_12_AH25IO_L19P_T3_1 2_AF20IO_L19N_T3_VREF_12_AF21IO_L20P_T3_ 12_AG22IO_L20N_T3_12_AH22IO_L21P_T3_DQS_ 12_AJ22IO_L21N_T3_DQS_12_AJ23IO_L22P_T3_ 12_AG20IO_L22N_T3_12_AH20IO_L23P_T3_12_A H21IO_L23N_T3_12_AJ21IO_L24P_T3_12_AK20I O_L24N_T3_12_AK21IO_25_12_AE20 VCCO_12_AC23 VCCO_12_AD20 VCCO_12_AF24 VCCO_12_AG21 VCCO_12_AK22 VCCO_12_Y22XC7K325 TFFG900 BANK 12 SCHEM, ROHS COMPLIANTSCH P/N: 0381397 ASSY P/N: 0431641 PCB P/N: 1280565KC705 EVALUATION PLATFORMFPGA Banks 0,12 FPGA Banks 0,12BF4-2-2012_15 ,29 FPGA_PROG_BSI5326_INT_ALM_LS30 HDMI_INT3326 FPGA_CCLKVCC2V5_FPGAVCC2V5_FPGA1234DS21 LED-GRN-REDFPGA_INIT_B3, ,26 FPGA_INIT_BGNDofSheetDate:Title:Ver:ABCD 1234 DCBA4321 Sheet Size: BRev:Drawn ByIO_0_13_Y25IO_L1P_T0_13_Y26IO_L1N_T0_1 3_AA26IO_L2P_T0_13_W27IO_L2N_T0_13_W28IO _L3P_T0_DQS_13_Y28IO_L3N_T0_DQS_13_AA28I O_L4P_T0_13_W29IO_L4N_T0_13_Y29IO_L5P_T0 _13_AA27IO_L5N_T0_13_AB28IO_L6P_T0_13_AA 25IO_L6N_T0_VREF_13_AB25IO_L7P_T1_13_AC2 9IO_L7N_T1_13_AC30IO_L8P_T1_13_Y30IO_L8N _T1_13_AA30IO_L9P_T1_DQS_13_AD29IO_L9N_T 1_DQS_13_AE29IO_L10P_T1_13_AB29IO_L10N_T 1_13_AB30IO_L11P_T1_SRCC_13_AD27IO_L11N_ T1_SRCC_13_AD28IO_L12P_T1_MRCC_13_AB27IO _L12N_T1_MRCC_13_AC27IO_L13P_T2_MRCC_13_ AG29IO_L13N_T2_MRCC_13_AH29IO_L14P_T2_SR CC_13_AE28IO_L14N_T2_SRCC_13_AF28IO_L15P _T2_DQS_13_AK29IO_L15N_T2_DQS_13_AK30IO_ L16P_T2_13_AE30IO_L16N_T2_13_AF30IO_L17P _T2_13_AJ28IO_L17N_T2_13_AJ29IO_L18P_T2_ 13_AG30IO_L18N_T2_13_AH30IO_L19P_T3_13_A C26IO_L19N_T3_VREF_13_AD26IO_L20P_T3_13_ AJ27IO_L20N_T3_13_AK28IO_L21P_T3_DQS_13_ AG27IO_L21N_T3_DQS_13_AG28IO_L22P_T3_13_ AH26IO_L22N_T3_13_AH27IO_L23P_T3_13_AF26 IO_L23N_T3_13_AF27IO_L24P_T3_13_AJ26IO_L 24N_T3_13_AK26IO_25_13_AE26 VCCO_13_AA29 VCCO_13_AB26 VCCO_13_AD30 VCCO_13_AE27 VCCO_13_AH28 VCCO_13_AJ25XC7K325 TFFG900 BANK 13IO_0_14_R19IO_L1P_T0_D00_MOSI_14_P24IO _L1N_T0_D01_DIN_14_R25IO_L2P_T0_D02_14_R 20IO_L2N_T0_D03_14_R21IO_L3P_T0_DQS_PUDC _B_14_R23IO_L3N_T0_DQS_EMCCLK_14_R24IO_L 4P_T0_D04_14_T20IO_L4N_T0_D05_14_T21IO_L 5P_T0_D06_14_T22IO_L5N_T0_D07_14_T23IO_L 6P_T0_FCS_B_14_U19IO_L6N_T0_D08_VREF_14_ U20IO_L7P_T1_D09_14_P29IO_L7N_T1_D10_14_ R29IO_L8P_T1_D11_14_P27IO_L8N_T1_D12_14_ P28IO_L9P_T1_DQS_14_R30IO_L9N_T1_DQS_D13 _14_T30IO_L10P_T1_D14_14_P26IO_L10N_T1_D 15_14_R26IO_L11P_T1_SRCC_14_R28IO_L11N_T 1_SRCC_14_T28IO_L12P_T1_MRCC_14_T26IO_L1 2N_T1_MRCC_14_T27IO_L13P_T2_MRCC_14_U27I O_L13N_T2_MRCC_14_U28IO_L14P_T2_SRCC_14_ T25IO_L14N_T2_SRCC_14_U25IO_L15P_T2_DQS_ RDWR_B_14_U29IO_L15N_T2_DQSDOUT_CSOB_14_ U30IO_L16P_T2_CSI_B_14_V26IO_L16N_T2_A15 _D31_14_V27IO_L17P_T2_A14_D30_14_V29IO_L 17N_T2_A13_D29_14_V30IO_L18P_T2_A12_D28_ 14_V25IO_L18N_T2_A11_D27_14_W26IO_L19P_T 3_A10_D26_14_V19IO_L19N_T3_A09_D25_VREF_ 14_V20IO_L20P_T3_A08_D24_14_W23IO_L20N_T 3_A07_D23_14_W24IO_L21P_T3_DQS_14_U22IO_ L21N_T3_DQS_A06_D22_14_U23IO_L22P_T3_A05 _D21_14_V21IO_L22N_T3_A04_D20_14_V22IO_L 23P_T3_A03_D19_14_U24IO_L23N_T3_A02_D18_ 14_V24IO_L24P_T3_A01_D17_14_W21IO_L24N_T 3_A00_D16_14_W22IO_25_14_W19 VCCO_14_P30 VCCO_14_R27 VCCO_14_T24 VCCO_14_U21 VCCO_14_V28 VCCO_14_W25XC7K325 TFFG900 BANK 14 SCHEM, ROHS COMPLIANTSCH P/N: 0381397 ASSY P/N: 0431641 PCB P/N: 1280565KC705 EVALUATION PLATFORMFPGA Banks 13, 14 FPGA Banks 13, :Title:Ver:ABCD1234 DCBA4321 Sheet Size: BRev:Drawn ByIO_0_15_M19IO_L1P_T0_AD0P_15_J23IO_L1N _T0_AD0N_15_J24IO_L2P_T0_AD8P_15_L22IO_L 2N_T0_AD8N_15_L23IO_L3P_T0_DQS_AD1P_15_K 23IO_L3N_T0_DQS_AD1N_15_K24IO_L4P_T0_AD9 P_15_L21IO_L4N_T0_AD9N_15_K21IO_L5P_T0_A D2P_15_J21IO_L5N_T0_AD2N_15_J22IO_L6P_T0 _15_M20IO_L6N_T0_VREF_15_L20IO_L7P_T1_AD 10P_15_J29IO_L7N_T1_AD10N_15_H29IO_L8P_T 1_AD3P_15_J27IO_L8N_T1_AD3N_15_J28IO_L9P _T1_DQS_AD11P_15_L30IO_L9N_T1_DQS_AD11N_ 15_K30IO_L10P_T1_AD4P_15_K26IO_L10N_T1_A D4N_15_J26IO_L11P_T1_SRCC_AD12P_15_L26IO _L11N_T1_SRCC_AD12N_15_L27IO_L12P_T1_MRC C_AD5P_15_L25IO_L12N_T1_MRCC_AD5N_15_K25 IO_L13P_T2_MRCC_15_K28IO_L13N_T2_MRCC_15 _K29IO_L14P_T2_SRCC_15_M28IO_L14N_T2_SRC C_15_L28IO_L15P_T2_DQS_15_M29IO_L15N_T2_ DQS_ADV_B_15_M30IO_L16P_T2_A28_15_N27IO_ L16N_T2_A27_15_M27IO_L17P_T2_A26_15_N29I O_L17N_T2_A25_15_N30IO_L18P_T2_A24_15_N2 5IO_L18N_T2_A23_15_N26IO_L19P_T3_A22_15_ N19IO_L19N_T3_A21_VREF_15_N20IO_L20P_T3_ A20_15_N21IO_L20N_T3_A19_15_N22IO_L21P_T 3_DQS_15_P23IO_L21N_T3_DQS_A18_15_N24IO_ L22P_T3_A17_15_P21IO_L22N_T3_A16_15_P22I O_L23P_T3_FOE_B_15_M24IO_L23N_T3_FWE_B_1 5_M25IO_L24P_T3_RS1_15_M22IO_L24N_T3_RS0 _15_M23IO_25_15_P19 VCCO_15_J25 VCCO_15_K22 VCCO_15_L29 VCCO_15_M26 VCCO_15_N23 VCCO_15_P20XC7K325 TFFG900 BANK 15IO_0_16_F23IO_L1P_T0_16_B23IO_L1N_T0_1 6_A23IO_L2P_T0_16_E23IO_L2N_T0_16_D23IO_ L3P_T0_DQS_16_F25IO_L3N_T0_DQS_16_E25IO_ L4P_T0_16_E24IO_L4N_T0_16_D24IO_L5P_T0_1 6_F26IO_L5N_T0_16_E26IO_L6P_T0_16_G23IO_ L6N_T0_VREF_16_G24IO_L7P_T1_16_B27IO_L7N _T1_16_A27IO_L8P_T1_16_C24IO_L8N_T1_16_B 24IO_L9P_T1_DQS_16_B28IO_L9N_T1_DQS_16_A 28IO_L10P_T1_16_A25IO_L10N_T1_16_A26IO_L 11P_T1_SRCC_16_D26IO_L11N_T1_SRCC_16_C26 IO_L12P_T1_MRCC_16_C25IO_L12N_T1_MRCC_16 _B25IO_L13P_T2_MRCC_16_D27IO_L13N_T2_MRC C_16_C27IO_L14P_T2_SRCC_16_E28IO_L14N_T2 _SRCC_16_D28IO_L15P_T2_DQS_16_C29IO_L15N _T2_DQS_16_B29IO_L16P_T2_16_D29IO_L16N_T 2_16_C30IO_L17P_T2_16_B30IO_L17N_T2_16_A 30IO_L18P_T2_16_E29IO_L18N_T2_16_E30IO_L 19P_T3_16_H24IO_L19N_T3_VREF_16_H25IO_L2 0P_T3_16_G28IO_L20N_T3_16_F28IO_L21P_T3_ DQS_16_G27IO_L21N_T3_DQS_16_F27IO_L22P_T 3_16_G29IO_L22N_T3_16_F30IO_L23P_T3_16_H 26IO_L23N_T3_16_H27IO_L24P_T3_16_H30IO_L 24N_T3_16_G30IO_25_16_G25 VCCO_16_A29 VCCO_16_B26 VCCO_16_C23 VCCO_16_D30 VCCO_16_E27 VCCO_16_F24 VCCO_16_H28XC7K325 TFFG900 BANK 16 SCHEM, ROHS COMPLIANTSCH P/N: 0381397 ASSY P/N: 0431641 PCB P/N: 1280565KC705 EVALUATION PLATFORMFPGA Banks 15, 16 FPGA Banks 15, 16BF4-2-2012_15 ,27 FLASH_A2426,27 USER_SMA_CLOCK_P23 USER_SMA_CLOCK_N23 FMC_HPC_LA02_P18 FMC_HPC_LA02_N1818 FMC_HPC_LA04_P18 FMC_HPC_LA04_NFMC_HPC_LA06_P16 FMC_HPC_LA06_N1630 PCIE_PERST_LSFMC_HPC_LA05_P16 FMC_HPC_LA05_N1617 FMC_HPC_LA03_P18 FMC_HPC_LA07_P18 FMC_HPC_LA07_NFMC_HPC_LA12_P17 FMC_HPC_LA12_N1716 FMC_HPC_LA10_P16 FMC_HPC_LA10_N18 FMC_HPC_LA11_P18 FMC_HPC_LA11_NHDMI_R_D1034 HDMI_R_D113430 PCIE_WAKE_B_LSVADJ_FPGA16 FMC_HPC_LA13_N16 FMC_HPC_LA13_P16 FMC_HPC_LA09_N16 FMC_HPC_LA09_P16 FMC_HPC_LA14_N16 FMC_HPC_LA14_P17 FMC_HPC_LA00_CC_N17 FMC_HPC_LA00_CC_P16 FMC_HPC_LA01_CC_N16 FMC_HPC_LA01_CC_PFMC_HPC_LA15_N18 FMC_HPC_LA15_P1818 FMC_HPC_CLK0_M2C_N18 FMC_HPC_CLK0_M2C_P17 FMC_HPC_LA03_N17 FMC_HPC_LA08_N17 FMC_HPC_LA08_P17 FMC_HPC_LA16_N17 FMC_HPC_LA16_P34 HDMI_R_D234 HDMI_R_D3 HDMI_R_D43434 HDMI_R_D5 HDMI_R_D63434 HDMI_R_D734 HDMI_R_D9 HDMI_R_D03434 HDMI_R_D134 HDMI_R_D8 SFP_LOS_LS3026 FLASH_FWE_BFLASH_OE_B2626 FLASH_A16 FLASH_A172626 FLASH_A18 IIC_MUX_RESET_B32 FLASH_A1926 FLASH_A2026 FLASH_A2126 FLASH_A222626 FLASH_A2325 PHY_TXD1 PHY_INT2525 PHY_TXER25 PHY_TXCTL_TXEN25 PHY_TXD026 FLASH_ADV_B25 PHY_TXD225 PHY_TXD325 PHY_TXCLKUSB_CTS2735SM_FAN_PWM25 PHY_TXD425 PHY_TXD525 PHY_TXC_GTXCLK25 PHY_TXD6 FMC_C2M_PG_LS3030 FMC_HPC_PG_M2C_LS25 PHY_RESET30 FMC_HPC_PRSNT_M2C_B_LS30 FMC_LPC_PRSNT_M2C_B_LS25 PHY_MDIO32 IIC_SCL_MAINIIC_SDA_MAIN3227 USB_RXUSB_RTS27 XADC_VAUX8N_R31 XADC_VAUX8P_R3131 XADC_VAUX0N_RXADC_VAUX0P_R3127 USB_TX23 USER_CLOCK_P23 USER_CLOCK_NofSheetDate:Title:Ver:ABCD12 34 DCBA4321 Sheet Size: BRev:Drawn ByIO_0_18_G12IO_L1P_T0_18_L16IO_L1N_T0_1 8_K16IO_L2P_T0_18_L15IO_L2N_T0_18_K15IO_ L3P_T0_DQS_18_L12IO_L3N_T0_DQS_18_L13IO_ L4P_T0_18_K13IO_L4N_T0_18_J13IO_L5P_T0_1 8_K14IO_L5N_T0_18_J14IO_L6P_T0_18_L11IO_ L6N_T0_VREF_18_K11IO_L7P_T1_18_H15IO_L7N _T1_18_G15IO_L8P_T1_18_J11IO_L8N_T1_18_J 12IO_L9P_T1_DQS_18_J16IO_L9N_T1_DQS_18_H 16IO_L10P_T1_18_H11IO_L10N_T1_18_H12IO_L 11P_T1_SRCC_18_H14IO_L11N_T1_SRCC_18_G14 IO_L12P_T1_MRCC_18_G13IO_L12N_T1_MRCC_18 _F13IO_L13P_T2_MRCC_18_D12IO_L13N_T2_MRC C_18_D13IO_L14P_T2_SRCC_18_F12IO_L14N_T2 _SRCC_18_E13IO_L15P_T2_DQS_18_C12IO_L15N _T2_DQS_18_B12IO_L16P_T2_18_F11IO_L16N_T 2_18_E11IO_L17P_T2_18_A11IO_L17N_T2_18_A 12IO_L18P_T2_18_D11IO_L18N_T2_18_C11IO_L 19P_T3_18_F15IO_L19N_T3_VREF_18_E16IO_L2 0P_T3_18_E14IO_L20N_T3_18_E15IO_L21P_T3_ DQS_18_D14IO_L21N_T3_DQS_18_C14IO_L22P_T 3_18_B13IO_L22N_T3_18_A13IO_L23P_T3_18_C 15IO_L23N_T3_18_B15IO_L24P_T3_18_B14IO_L 24N_T3_18_A15IO_25_18_F16 VCCO_18_C13 VCCO_18_D10 VCCO_18_F14 VCCO_18_G11 VCCO_18_J15 VCCO_18_K12XC7K325 TFFG900 BANK 18IO_0_17_G19IO_L1P_T0_17_K18IO_L1N_T0_1 7_J18IO_L2P_T0_17_H20IO_L2N_T0_17_G20IO_ L3P_T0_DQS_17_J17IO_L3N_T0_DQS_17_H17IO_ L4P_T0_17_J19IO_L4N_T0_17_H19IO_L5P_T0_1 7_L17IO_L5N_T0_17_L18IO_L6P_T0_17_K19IO_ L6N_T0_VREF_17_K20IO_L7P_T1_17_H21IO_L7N _T1_17_H22IO_L8P_T1_17_D21IO_L8N_T1_17_C 21IO_L9P_T1_DQS_17_G22IO_L9N_T1_DQS_17_F 22IO_L10P_T1_17_D22IO_L10N_T1_17_C22IO_L 11P_T1_SRCC_17_F21IO_L11N_T1_SRCC_17_E21 IO_L12P_T1_MRCC_17_F20IO_L12N_T1_MRCC_17 _E20IO_L13P_T2_MRCC_17_D17IO_L13N_T2_MRC C_17_D18IO_L14P_T2_SRCC_17_E19IO_L14N_T2 _SRCC_17_D19IO_L15P_T2_DQS_17_D16IO_L15N _T2_DQS_17_C16IO_L16P_T2_17_G18IO_L16N_T 2_17_F18IO_L17P_T2_17_C17IO_L17N_T2_17_B 17IO_L18P_T2_17_G17IO_L18N_T2_17_F17IO_L 19P_T3_17_C20IO_L19N_
