Kintex UltraScale FPGA Data Sheet: DC and AC …

1 DS892 ( ) January 8, Specification1 Copyright 2013 2018 xilinx , Inc. xilinx , the xilinx logo, Artix, ISE, Kintex , Spartan, Virtex, Vivado, Zynq, and other designated brands included herein are trademarks of xilinx in the United States and other countries. All other trademarks are the property of their respective xilinx Kintex UltraScale fpgas are available in -3, -2, -1, and -1L speed grades, with -3 having the highest performance. The -1L devices can operate at either of two VCCINT voltages, and and are screened for lower maximum static power. When operated at VCCINT= , the speed specification of a -1L device is the same as the -1 speed grade. When operated at VCCINT= , the -1L performance and static and dynamic power is and AC characteristics are specified in commercial, extended, industrial, and military temperature ranges.

2 Except the operating temperature range or unless otherwise noted, all the DC and AC electrical parameters are the same for a particular speed grade (that is, the timing characteristics of a -1 speed grade industrial device are the same as for a -1 speed grade commercial device). However, only selected speed grades and/or devices are available in each temperature supply voltage and junction temperature specifications are representative of worst-case conditions. The parameters included are common to popular designs and typical data sheet, part of an overall set of documentation on the UltraScale architecture-based devices, is available on the xilinx website at CharacteristicsKintex UltraScale fpgas Data Sheet: DC and AC switching CharacteristicsDS892 ( ) January 8, 2018 Product SpecificationTable 1.

3 Absolute Maximum Ratings(1)SymbolDescriptionMinMaxUnitsFP GA LogicVCCINTI nternal supply voltage (2)Internal supply voltage for the I/O banks supply voltage voltage for the block RAM memories drivers supply voltage for HR I/O banks drivers supply voltage for HP I/O banks (3)Auxiliary supply voltage for the I/O banks reference voltage (4)(5)(6)I/O input voltage for HR I/O banks + input voltage for HP I/O banks + input voltage (when VCCO = ) for VREF and differential I/O standards except TMDS_33(7) FeedbackKintex UltraScale fpgas Data Sheet: DC and AC switching CharacteristicsDS892 ( ) January 8, Specification2 VBATTKey memory battery backup supply output current at the pad 2020mAIRMSA vailable RMS output current at the pad 2020mAGTH and GTY TransceiversVMGTAVCCA nalog supply voltage for the GTH and GTY transmitter and receiver circuits supply voltage for the GTH and GTY transmitter and receiver termination circuits analog Quad PLL (QPLL) voltage supply for the GTH and GTY transceivers and GTY transceiver reference clocks absolute input voltage supply voltage for the resistor calibration circuit of the GTH and GTY transceiver columns (RXP/RXN) and Transmitter (TXP/TXN) absolute input voltage input current for receiver input pins DC coupled RX termination = floating 0(8)

4 MAIDCIN-MGTAVTTDC input current for receiver input pins DC coupled RX termination = VMGTAVTT 10mAIDCIN-GNDDC input current for receiver input pins DC coupled RX termination = GND 10mAIDCIN-PROGDC input current for receiver input pins DC coupled RX termination = Programmable N/A(8)mAIDCOUT-FLOATDC output current for transmitter pins DC coupled RX termination = floating 0(8)mAIDCOUT-MGTAVTTDC output current for transmitter pins DC coupled RX termination = VMGTAVTT 6mASystem MonitorVCCADCS ystem Monitor supply relative to GNDADC Monitor reference input relative to GNDADC temperature (ambient) 65150 CTSOLM aximum soldering temperature for Pb-free component bodies(9) 260 CMaximum soldering temperature for Pb/Sn component bodies(9) 220 CTable 1:Absolute Maximum Ratings(1) (Cont d)SymbolDescriptionMinMaxUnitsSend FeedbackKintex UltraScale fpgas Data Sheet: DC and AC switching CharacteristicsDS892 ( ) January 8, Specification3 TjMaximum junction temperature(9) 125 CNotes: 1.

5 Stresses beyond those listed under Absolute Maximum Ratings might cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those listed under Operating Conditions is not implied. Exposure to Absolute Maximum Ratings conditions for extended periods of time might affect device VCCINT_IO must be connected to VCCAUX_IO must be connected to The lower absolute voltage specification always For I/O operation, see the UltraScale Architecture SelectIO Resources User Guide (UG571).6. The maximum limit applied to DC signals. For maximum undershoot and overshoot AC specifications, see Table 4 and Table See Table 12 for TMDS_33 For more information on supported GTH or GTY transceiver terminations see the UltraScale Architecture GTH Transceiver User Guide (UG576) or the UltraScale Architecture GTY Transceiver User Guide (UG578).

6 9. For soldering guidelines and thermal considerations, see the UltraScale and UltraScale + fpgas Packaging and Pinout Specifications (UG575).Table 2:Recommended Operating Conditions(1)(2)SymbolDescriptionMinTypM axUnitsFPGA LogicVCCINTI nternal supply -1L ( ) devices: internal supply -3 ( only) devices: internal supply (3)Internal supply voltage for the I/O -1L ( ) devices: internal supply voltage for the I/O -3 ( only) devices: internal supply voltage for the I/O RAM supply -3 ( only) devices: block RAM supply supply (4)(5)Supply voltage for HR I/O voltage for HP I/O (6)Auxiliary I/O supply (7)I/O input voltage VCCO+ input voltage (when VCCO= ) for VREF and differential I/O standards except TMDS_33(8). (9)Maximum current through any pin in a powered or unpowered bank when forward biasing the clamp diode.

7 (10)Battery and GTY TransceiversVMGTAVCC(11)Analog supply voltage for the GTH and GTY transceivers(10) (11)Analog supply voltage for the GTH and GTY transmitter and receiver termination (11)Auxiliary analog QPLL voltage supply for the (11)Analog supply voltage for the resistor calibration circuit of the GTH and GTY transceiver 1:Absolute Maximum Ratings(1) (Cont d)SymbolDescriptionMinMaxUnitsSend FeedbackKintex UltraScale fpgas Data Sheet: DC and AC switching CharacteristicsDS892 ( ) January 8, Specification4 SYSMONVCCADCSYSMON supply relative to supplied reference temperature operating range for commercial (C) temperature devices0 85 CJunction temperature operating range for extended (E) temperature devices0 100 CJunction temperature operating range for industrial (I) temperature devices 40 100 CJunction temperature operating range for military (M) temperature devices 55 125 CNotes: 1.

8 All voltages are relative to For the design of the power distribution system consult UltraScale Architecture PCB Design Guide (UG583).3. VCCINT_IO must be connected to For VCCO_0, the minimum recommended operating voltage for power on and during configuration is After configuration, data is retained even if VCCO drops to Includes VCCO of (HP I/O only), , , , , (HR I/O only) at 5%, and (HR I/O only) at +3/ 5%.6. VCCAUX_IO must be connected to The lower absolute voltage specification always See Table 12 for TMDS_33 A total of 200 mA per 52-pin bank should not be VBATT is required only when using bitstream encryption. If battery is not used, connect VBATT to either ground or Each voltage listed requires filtering as described in UltraScale Architecture GTH Transceiver User Guide (UG576).

9 Table 2:Recommended Operating Conditions(1)(2) (Cont d)SymbolDescriptionMinTypMaxUnitsSend FeedbackKintex UltraScale fpgas Data Sheet: DC and AC switching CharacteristicsDS892 ( ) January 8, Specification5 Table 3:DC characteristics Over Recommended Operating ConditionsSymbolDescriptionMinTyp(1)MaxU nitsVDRINTData retention VCCINT voltage (below which configuration data might be lost) VVDRAUXData retention VCCAUX voltage (below which configuration data might be lost) VIREFVREF leakage current per pin 15 AILI nput or output leakage current per pin (sample-tested) 15(2) AInput or output leakage current per pin for XQ devices (sample-tested) 20(2) ACIN(3)Die input capacitance at the pad (HP I/O) input capacitance at the pad (HR I/O) pull-up (when selected) at VIN=0V, VCCO= 175 APad pull-up (when selected) at VIN=0V, VCCO= 169 APad pull-up (when selected) at VIN=0V, VCCO= 678 APad pull-up (when selected) at VIN=0V, VCCO= 450 APad pull-up (when selected)

10 At VIN=0V, VCCO= 262 AIRPDPad pull-down (when selected) at VIN= 190 APad pull-down (when selected) at VIN= 685 AICCADCA nalog supply current per SYSMON instance in powered up state. (4)Battery supply current 150nACalibrated programmable on-die termination (DCI) in HP I/O banks(6) (measured per JEDEC specification)R(7)Thevenin equivalent resistance of programmable input termination to VCCO/2 where ODT = RTT_40 10%(5) 40+10%(5) Thevenin equivalent resistance of programmable input termination to VCCO/2 where ODT = RTT_48 10%(5) 48 +10%(5) Thevenin equivalent resistance of programmable input termination to VCCO/2 where ODT = RTT_60 10%(5) 60 +10%(5) Programmable input termination to VCCO where ODT = RTT_40 10%(5) 40 +10%(5) Programmable input termination to VCCO where ODT = RTT_48 10%(5) 48 +10%(5) Programmable input termination to VCCO where ODT = RTT_60 10%(5) 60 +10%(5) Programmable input termination to VCCO where ODT = RTT_120 10%(5)