Laboratory Manual DIGITAL ELECTRONICS

1 1 Jawaharlal Nehru Engineering College Laboratory Manual DIGITAL ELECTRONICS For Second Year Students CSE / IT Dept: Computer Science & Engineering (NBA Accredited) 2 Author JNEC, Aurangabad FOREWORD It is my great pleasure to present this Laboratory Manual for Second year engineering students for the subject of DIGITAL ELECTRONICS keeping in view the vast coverage required for visualization of concepts of DIGITAL ELECTRONICS with simple language. As a student, many of you may be wondering with some of the questions in your mind regarding the subject and exactly what has been tried is to answer through this Manual .

2 As you may be aware that MGM has already been awarded with ISO 9000 certification and it is our endure to technically equip our students taking the advantage of the procedural aspects of ISO 9000 Certification. Faculty members are also advised that covering these aspects in initial stage itself, will greatly relived them in future as much of the load will be taken care by the enthusiasm energies of the students once they are conceptually clear. Dr Principal 3 Laboratory Manual CONTENTS This Manual is intended for the Second year students of CSE branches in the subject of DIGITAL ELECTRONICS .

3 This Manual typically contains practical/Lab Sessions related DIGITAL ELECTRONICS covering various aspects related the subject to enhanced understanding. Students are advised to thoroughly go though this Manual rather than only topics mentioned in the syllabus as practical aspects are the key to understanding and conceptual visualization of theoretical aspects covered in the books. Good Luck for your Enjoyable Laboratory Sessions Ms. Neha R. Khatri HOD, CSE Assist Prof, CSE Dept. 4 DOs and DON Ts in Laboratory : 1.

4 Make entry in the Log Book as soon as you enter the Laboratory . 2. All the students should sit according to their roll numbers starting from their left to right. 3. All the students are supposed to enter the terminal number in the log book. 4. Do not change the terminal on which you are working. 5. All the students are expected to get at least the algorithm of the program/concept to be implemented. 6. Strictly observe the instructions given by the teacher/Lab Instructor. Instruction for Laboratory Teachers:: 1. Submission related to whatever lab work has been completed should be done during the next lab session.

5 The immediate arrangements for printouts related to submission on the day of practical assignments. 2. Students should be taught for taking the printouts under the observation of lab teacher. 3. The promptness of submission should be encouraged by way of marking and evaluation patterns that will benefit the sincere students. 5 SUBJECT INDEX 1. Study of DIGITAL ICs & verification of Logic Gates 2. Study & verification of operation of Half Adder & Full Adder. 3. Given a 4-variable logic expression, simplify it using Entered Variable Map and realize the simplified logic expression using 8:1 multiplexer IC.

6 4. Design and develop the Verilog /VHDL code for an 8:1 multiplexer. Simulate and verify its working. 5. Realize a J-K Master / Slave Flip-Flop using NAND gates and verify its truth table. 6. Design and develop the Verilog / VHDL code for D Flip-Flop with positive-edge triggering. Simulate and verify its working. 7. Design and implement a mod-n (n<8) synchronous up counter using JK Flip-Flop ICs and demonstrate its working. 8. Design and develop the Verilog / VHDL code for mod-8 up counter. Simulate and verify its working. 9. Design and implement a ring counter using 4-bit shift register and demonstrate its working.

7 10. Design and develop the Verilog / VHDL code for switched tail counter. Simulate and verify its working. 11. Design and implement an asynchronous counter using decade counter IC to count up from 0 to n (n<=9) and demonstrate its working. 12. Design a 4 bit R-2R ladder D/A converter using op-amp. Determine its accuracy and resolution. 6 Experiment Aim: To Study logic gates such as AND, OR, NOT, NAND, NOR, XOR Apparatus: Bread board, wires, IC-7402(AND),7432(OR),7404 (NOT) Theory: 1. AND: Logical AND operation is defined as the output is 1 iff all the inputs are 1 Circuit of logical AND is shown below.

8 It has N inputs (N>=2) and one output. DIGITAL signals are applied at the input terminal marked A,B, ,N, the other terminal being grounded(not shown in diagram)The output is obtained at the terminal marked Y, and it is also a DIGITAL signal. Fig1. LOGIC DIAGRAM OF AND GATE Mathematically, AND operation is written as Y=A AND B AND C Y=A .B. C Y= Truth Table for AND operation INPUTS OUTPUTS A B Y 0 0 0 0 1 0 1 0 0 1 1 1 2.

9 OR: Logical OR operation is defined as the output is 1 if at least one of the inputs is 1 . Circuit of logical OR is shown below. It has N inputs (N>=2) and one output. DIGITAL signals are applied at the input terminal marked A, B, ,N, the other terminal being grounded(not shown in diagram).The output is obtained at the terminal marked Y, and it is also a DIGITAL signal. 7 Fig DIAGRAM OF OR GATE Mathematically, OR operation is written as Y=A OR B OR C Y=A +B+C+..+N Truth Table for OR operation INPUTS OUTPUTS A B Y 0 0 0 0 1 1 1 0 1 1 1 1 : Logical NOT operation is also called as Inverter.

10 It has one input (A) and one output (Y).Its logic Equation is written as Y = NOT A And is read as Y equals not A or Y equals complement of A . Fig DIAGRAM OF NOT GATE INPUT OUTPUTS A Y 0 1 1 0 8 4. NAND Gate: The output is 1 when either of inputs A or B is 1, or if neither is 1. In other words, it is normally 1, going 0 only if both A and B are 1. Fig DIAGRAM OF NAND GATE INPUTS OUTPUTS A B Y 0 0 0 0 1 0 1 0 0 1 1 1 4.