LM13600 Dual Operational Transconductance …

1 TL/H/7980LM13600 dual Operational Transconductance Amplifierswith linearizing Diodes and BuffersFebruary 1995LM13600 dual Operational TransconductanceAmplifiers with linearizing Diodes and BuffersGeneral DescriptionThe LM13600 series consists of two current controlledtransconductance amplifiers each with differential inputsand a push-pull output. The two amplifiers share commonsupplies but otherwise operate independently. Linearizingdiodes are provided at the inputs to reduce distortion andallow higher input levels. The result is a 10 dB signal-to-noise improvement referenced to percent THD. Con-trolled impedance buffers which are especially designed tocomplement the dynamic range of the amplifiers are over 6 decadesYExcellent gmlinearityYExcellent matching between amplifiersYLinearizing diodesYControlled impedance buffersYHigh output signal-to-noise ratioApplicationsYCurrent-controlled amplifiersYCurrent-controlled impedancesYCurrent-controlled filtersYCurrent-controlled oscillatorsYMultiplexersYTimersYSample and hold circuitsConnection DiagramDual-In-Line and Small Outline PackagesTL/H/7980 2 Top ViewOrder Number LM13600M.

2 LM13600N or LM13600 ANSee NS Package Number M16A or N16AC1995 National Semiconductor CorporationRRD-B30M115/Printed in U. S. Maximum RatingsIf Military/Aerospace specified devices are required,please contact the National Semiconductor SalesOffice/Distributors for availability and Voltage (Note 1)LM1360036 VDCorg18 VLM13600A44 VDCorg22 VPower Dissipation (Note 2) TAe25 C570 mWDifferential Input Voltageg5 VDiode Bias Current (ID)2mAAmplifier Bias Current (IABC)2mAOutput Short Circuit DurationContinuousBuffer Output Current (Note 3)20 mAOperating Temperature Range0 Ctoa70 CDC Input VoltageaVStobVSStorage Temperature Rangeb65 Ctoa150 CSoldering InformationDual-In-Line PackageSoldering (10 seconds)260 CSmall Outline PackageVapor Phase (60 seconds)

3 215 CInfrared (15 seconds)220 CSee AN-450 Surface Mounting Methods and Their Effecton Product Reliability for other methods of soldering sur-face mount Characteristics(Note 4)ParameterConditionsLM13600LM13600 AUnitsMinTypMax MinTypMaxInput Offset Voltage (VOS) Specified Temperature DiodesDiode Bias Current (ID) Offset Offset Bias Specified Temperature Range1817mAForwardTransconductance (gm)6700 9600 13000 7700 9600 12000mmhoOver Specified Temperature Range Output CurrentRLe0, IABCe5mA5357mARLe0, IABCe500mA350500650 350500650mARLe0, Over Specified Temp Range 300300mAPeak Output VoltagePositiveRLe%, , CurrentIABCe500mA, Both Mode to Input (Note 5)100100dB20 Hzkfk20 kHzDifferential Input Current IABCe0, CurrentIABCe0 (Refer to Test Circuit) Characteristics(Note 4) (Continued)ParameterConditionsLM13600LM1 3600 AUnitsMinTypMaxMinTypMaxInput Resistance10261026kXOpen Loop Bandwidth22 MHzSlew RateUnity Gain Compensated5050V/msBuffer Input Current(Note 5), Except Buffer Output Voltage(Note 5)1010 VNote 1.

4 For selections to a supply voltage aboveg22V, contact 2:For operating at high temperatures, the device must be derated based on a 150 C maximum junction temperature and a thermal resistance of 175 C/Wwhich applies for the device soldered in a printed circuit board, operating in still 3:Buffer output current should be limited so as to not exceed package 4:These specifications apply for VSeg15V, TAe25 C, amplifier bias current (IABC)e500mA, pins 2 and 15 open unless otherwise specified. The inputsto the buffers are grounded and outputs are 5:These specifications apply for VSeg15V, IABCe500mA, ROUTe5kXconnected from the buffer output tobVSand the input of the buffer isconnected to the Transconductance amplifier DiagramOne Operational Transconductance AmplifierTL/H/7980 13 Typical Performance CharacteristicsInput Offset VoltageInput Offset CurrentInput Bias CurrentPeak Output CurrentCommon Mode RangePeak Output Voltage andLeakage CurrentInput LeakageTransconductanceInput ResistanceAmplifier Bias Voltage vsAmplifier Bias CurrentInput and Output CapacitanceOutput ResistanceTL/H/7980 34 Typical Performance Characteristics(Continued)

5 Input VoltageDistortion vs DifferentialVoltage vs amplifier Bias CurrentOutput Noise vs FrequencyTL/H/7980 4 Unity Gain FollowerTL/H/7980 5 Leakage Current Test CircuitTL/H/7980 6 Differential Input Current Test CircuitTL/H/7980 75 Circuit DescriptionThe differential transistor pair Q4and Q5form a transcon-ductance stage in that the ratio of their collector currents isdefined by the differential input voltage according to thetransfer function:VINekTqInI5I4(1)where VINis the differential input voltage, kT/q is approxi-mately 26 mV at 25 C and I5and I4are the collector cur-rents of transistors Q5and Q4respectively. with the excep-tion of Q3and Q13, all transistors and diodes are identical insize.

6 Transistors Q1and Q2with Diode D1form a currentmirror which forces the sum of currents I4and I5to equalIABC;I4aI5eIABC(2)where IABCis the amplifier bias current applied to the small differential input voltages the ratio of I4and I5approaches unity and the Taylor series of the In functioncan be approximated as:kTqInI5I4&kTqI5bI4I4(3)I4&I5&IABC2 VIN IABCq2kT(eI5bI4(4)Collector currents I4and I5are not very useful by them-selves and it is necessary to subtract one current from theother. The remaining transistors and diodes form three cur-rent mirrors that produce an output current equal to I5minusI4thus:VIN IABCq2kT(eIOUT(5)The term in brackets is then the Transconductance of theamplifier and is proportional to DiodesFor differential voltages greater than a few millivolts, Equa-tion 3 becomes less valid and the Transconductance be-comes increasingly 1demonstrates howthe internal diodes can linearize the transfer function of theamplifier.))

7 For convenience assume the diodes are biasedwith current sources and the input signal is in the form ofcurrent IS. Since the sum of I4and I5is IABCand the differ-ence is IOUT, currents I4and I5can be written as follows:I4eIABC2bIOUT2,I5eIABC2aIOUT2 Since the diodes and the input transistors have identicalgeometries and are subject to similar voltages and tempera-tures, the following is #2 IABCIDJ forlISlkID2(6)TL/H/7980 8 FIGURE 1. linearizing Diodes6 linearizing Diodes(Continued)Notice that in deriving Equation 6 no approximations havebeen made and there are no temperature-dependent limitations are that the signal current not exceed ID/2and that the diodes be biased with currents.

8 In practice,replacing the current sources with resistors will generateinsignificant Impedance BuffersThe upper limit of Transconductance is defined by the maxi-mum value of IABC(2 mA). The lowest value of IABC forwhich the amplifier will function therefore determines theoverall dynamic range. At very low values of IABC, a bufferwhich has very low input bias current is desirable. An FETfollower satisfies the low input current requirement, but issomewhat non-linear for large voltage swing. The controlledimpedance buffer is a Darlington which modifies its inputbias current to suit the need. For low values of IABC, thebuffer s input current is minimal.

9 At higher levels of IABC,transistor Q3biases up Q12with a current proportional toIABCfor fast slew rate. When IABCis changed, the DC levelof the Darlington output buffer will shift. In audio applica-tions where IABCis changed suddenly, this shift may pro-duce an audible pop . For these applications the LM13700may produce superior Voltage ControlledAmplifiersFigure 2shows how the linearizing diodes can be used in avoltage-controlled amplifier . To understand the input bias-ing, it is best to consider the 13 kXresistor as a currentsource and use a Thevenin equivalent circuit as shown inFigure 3. This circuit is similar toFigure 1and operates thesame.

10 The potentiometer inFigure 2is adjusted to minimizethe effects of the control signal at the optimum signal-to-noise performance, IABC should beas large as possible as shown by the Output Voltage Bias Current graph. Larger amplitudes of input sig-nal also improve the S/N ratio. The linearizing diodes helphere by allowing larger input signals for the same outputdistortion as shown by the Distortion vs. Differential InputVoltage graph. S/N may be optimized by adjusting the mag-nitude of the input signal via RIN(Figure 2)until the outputdistortion is below some desired level. The output voltageswing can then be set at any level by selecting the noise contribution of the linearizing diodes isnegligible relative to the contribution of the amplifier s inter-nal transistors, IDshould be as large as possible.